SLVS203F June   1999  – January 2025 TPS769

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information (New Chip)
    5. 5.5 Thermal Information (Legacy Chip)
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
    8. 5.8 Typical Characteristics: Supported ESR Range
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Adjustable Device Feedback Resistors
        2. 7.2.2.2 Recommended Capacitor Types
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
        3. 8.1.1.3 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Typical Characteristics: Supported ESR Range

Equivalent series resistance (ESR) refers to the total series resistance. This resistance includes the ESR of the capacitor, any series resistance added externally, and PCB trace resistance to CO.

TPS769 TPS76933 Typical Regions of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-46 TPS76933 Typical Regions of Stability ESR vs Output Current (Legacy Chip)
TPS769 TPS76933 Typical Regions of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-48 TPS76933 Typical Regions of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-50 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-52 Typical Region of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-54 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-56 Typical Region of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-58 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-60 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-62 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-64 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 TPS76933 Typical Regions of Stability ESR vs Added Ceramic Capacitance (Legacy Chip)
 
Figure 5-47 TPS76933 Typical Regions of Stability ESR vs Added Ceramic Capacitance (Legacy Chip)
TPS769 TPS76933 Typical Regions of Stability ESR vs Added Ceramic Capacitance (Legacy Chip)
 
Figure 5-49 TPS76933 Typical Regions of Stability ESR vs Added Ceramic Capacitance (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-51 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-53 Typical Region of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-55 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-57 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-59 Typical Region of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-61 Typical Region of Stability ESR vs Output Current (New Chip)
TPS769 Typical Region of Stability ESR vs Output Current (Legacy Chip)
 
Figure 5-63 Typical Region of Stability ESR vs Output Current (Legacy Chip)
TPS769 Typical Region of Stability ESR vs Output Current (New Chip)
 
Figure 5-65 Typical Region of Stability ESR vs Output Current (New Chip)