SLVSBC6C March   2013  – December 2019 TPS84A20

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application
  4. Revision History
  5. Ordering Information
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Package Specifications
    4. 6.4 Electrical Characteristics
    5. 6.5 Thermal Information
  7. Device Information
    1. 7.1      Functional Block Diagram
    2. Table 1. Pin Descriptions
  8. Typical Characteristics (PVIN = VIN = 12 V)
  9. Typical Characteristics (PVIN = VIN = 5 V)
  10. 10Typical Characteristics (PVIN = 3.3 V, VIN = 5 V)
  11. 11Application Information
    1. 11.1  Adjusting the Output Voltage
    2. 11.2  Capacitor Recommendations for the TPS84A20 Power Supply
      1. 11.2.1 Capacitor Technologies
        1. 11.2.1.1 Electrolytic, Polymer-Electrolytic Capacitors
        2. 11.2.1.2 Ceramic Capacitors
        3. 11.2.1.3 Tantalum, Polymer-Tantalum Capacitors
      2. 11.2.2 Input Capacitor
      3. 11.2.3 Output Capacitor
    3. 11.3  Transient Response
    4. 11.4  Transient Waveforms
    5. 11.5  Application Schematics
    6. 11.6  VIN and PVIN Input Voltage
    7. 11.7  3.3 V PVIN Operation
    8. 11.8  Power Good (PWRGD)
    9. 11.9  Light Load Efficiency (LLE)
    10. 11.10 SYNC_OUT
    11. 11.11 Parallel Operation
    12. 11.12 Power-Up Characteristics
    13. 11.13 Pre-Biased Start-Up
    14. 11.14 Remote Sense
    15. 11.15 Thermal Shutdown
    16. 11.16 Output On/Off Inhibit (INH)
    17. 11.17 Slow Start (SS/TR)
    18. 11.18 Overcurrent Protection
    19. 11.19 Synchronization (CLK)
    20. 11.20 Sequencing (SS/TR)
    21. 11.21 Programmable Undervoltage Lockout (UVLO)
    22. 11.22 Layout Considerations
    23. 11.23 EMI
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RVQ|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) TPS84A20 UNIT
RVQ42
42 PINS
θJA Junction-to-ambient thermal resistance(2) 13.3 °C/W
ψJT Junction-to-top characterization parameter(3) 1.6
ψJB Junction-to-board characterization parameter(4) 5.3
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics Application Report.
The junction-to-ambient thermal resistance, θJA, applies to devices soldered directly to a 100-mm x 100-mm double-sided PCB with 2 oz. copper and natural convection cooling. Additional airflow reduces θJA.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature, TJ, of a device in a real system, using a procedure described in JESD51-2A (sections 6 and 7). TJ = ψJT * Pdis + TT; where Pdis is the power dissipated in the device and TT is the temperature of the top of the device.
The junction-to-board characterization parameter, ψJB, estimates the junction temperature, TJ, of a device in a real system, using a procedure described in JESD51-2A (sections 6 and 7). TJ = ψJB * Pdis + TB; where Pdis is the power dissipated in the device and TB is the temperature of the board 1mm from the device.