SLLSF63B March   2018  – October 2023 TUSB1002A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
      5. 7.3.5 USB3.2 Single Channel Operation (MODE = “1”)
      6. 7.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
      7. 7.3.7 Basic Redriver Operation (MODE = “0”)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.2 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 ESD Protection
      4. 8.2.4 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Adjustable VOD Linear Range and DC Gain

The CFG1 and CFG2 pins can be used to adjust the TUSB1002A output voltage swing linear range and receiver equalization DC gain. Table 7-3 details the available options.

For best performance, the TUSB1002A should be operated within its defined VOD linearity range. The gain of the incoming VID should be kept to less than or equal to the TUSB1002A VOD linear range setting. The can be determined by Equation 1:

Equation 1. VID at 5 GHz = VOD x (10-(Gv/20))

where

  • Gv = TUSB1002A Gain and VOD = TUSB1002A VOD linearity setting.

For example, for a VOD linearity range setting of 1200 mV, the maximum incoming VID signal at 5 GHz with a CHx_EQ[1:0] setting of 2 (5.5 dB) is 1200 x (10-(5.5/20)) = 637 mVpp. The TUSB1002A can be operated outside its VOD linear range but jitter will be higher.

Table 7-3 VOD Linear Range and DC Gain
SETTING # CFG1 PIN LEVEL CFG2 PIN LEVEL CH1 DC GAIN (dB) CH2 DC GAIN (dB) CH1 VOD LINEAR RANGE (mVpp) CH2 VOD LINEAR RANGE (mVpp)
1 0 0 +1 0 900 900
2 0 R 0 +1 900 900
3 0 F 0 0 900 900
4 0 1 +1 +1 900 900
5 R 0 0 0 1000 1000
6 R R +1 0 1000 1000
7 R F 0 -1 1000 1000
8 R 1 +2 +2 1000 1000
9 F 0 -1 -1 1200 1200
10 F R +2 +2 1200 1200
11 F F 0 0 1200 1200
12 F 1 +1 +1 1200 1200
13 1 0 +2 0 1200 1200
14 1 R 0 +2 1200 1200
15 1 F 0 +1 1200 1200
16 1 1 +1 0 1200 1200