SLLSF63B March   2018  – October 2023 TUSB1002A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
      5. 7.3.5 USB3.2 Single Channel Operation (MODE = “1”)
      6. 7.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
      7. 7.3.7 Basic Redriver Operation (MODE = “0”)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.2 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 ESD Protection
      4. 8.2.4 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 Linear Equalization

With a linear equalizer, the TUSB1002A can electrically shorten a particular channel allowing for longer run lengths.

GUID-1F2B848F-E70A-4DA9-9E06-0A609BB25EF9-low.gif Figure 7-1 Linear Equalizer

With a TUSB1002A, a longer trace can be made to have similar insertion loss as a shorter trace. For example, a long trace of X + Y inches can be made to have similar loss characteristics of a shorter trace of X inches.

The receiver equalization level for each channel is determined by the state of the CHx_EQ1 and CHx_EQ2 pins, where x = 1 or 2.

Table 7-2 EQ Configuration Options for 1200mV Linearity 0 dB DC Gain Setting
EQ SETTING #CHx_EQ2 PIN LEVELCHx_EQ1 PIN LEVELEQ GAIN at 2.5GHz / 5 GHz (dB)
1001.0 / 3.6
20R2.1 / 5.5
30F3.0 / 6.8
4014.0 / 8.1
5R04.6 / 9.0
6RR5.5 / 10.0
7RF6.2 / 10.8
8R16.9 / 11.6
9F07.3 / 11.9
10FR7.9 / 12.6
11FF8.4 / 13.1
12F19.0 / 13.7
13109.4 / 14.1
141R9.9 / 14.6
151F10.3 / 14.9
161110.7 / 15.3