USB3.2 10 Gbps Dual-channel Linear Redriver
Product details
Parameters
Package | Pins | Size
Features
- Supports USB3.2 x1 SuperSpeed (5 Gbps) and SuperSpeedPlus (10 Gbps)
- Supports PCI Express Gen3, SATA Express, and SATA Gen3.
- Ultra Low-Power Architecture
- Active: < 300 mW
- Disconnect/U2/U3: < 1.9 mW
- Shutdown: < 700 µW
- Adjustable Voltage Output Swing Linear Range up to 1200 mVpp
- No Host/Device Side Requirement
- 16 Settings for up to 16 dB at 10 Gbps of Linear Equalization
- Adjustable DC Equalization Gain
- Hot-Plug Capable
- Pin-to-Pin Compatible With LVPE502A and LVPE512 USB 3.0 Redriver
- Pin-to-Pin Compatible with TUSB1002 Redriver
- Temperature Range: 0°C to 70°C (Commercial) and –40°C to 85°C (Industrial)
- ±5 kV HBM ESD
- Available in Single 3.3 V Supply.
- Available in 4 mm x 4 mm VQFN
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Description
The TUSB1002A is the industry’s first dual-channel USB 3.2 x1 SuperSpeedPlus (SSP) redriver and signal conditioner. The device offers low power consumption on a 3.3-V supply with its ultra-low-power architecture. It supports the USB3.2 low power modes which further reduces idle power consumption.
The TUSB1002A implements a linear equalizer, supporting up to 16 dB of loss due to Inter-Symbol Interference (ISI). When USB signals travel across a PCB or cable, signal integrity degrades due to loss and inter-symbol interference. The linear equalizer compensates for the channel loss, and thereby, extends the channel length and enables systems to pass USB compliance. The dual lane implementation and small package size provides flexibility in the placement of the TUSB1002A in the USB3.2 path.
The TUSB1002A is available in either a 24-pin 4 mm x 4 mm VQFN. It is also available in a commercial grade (TUSB1002A) or industrial grade (TUSB1002AI).
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Plug-and-play design
- Power the EVM by USB VBUS or 5- to 5.5-V DC IN through a power jack
- Access the I2C bus through headers
- Configurable through dip switches
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGE) | 24 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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