SCES991
June 2025
TXG8020
,
TXG8021
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Electrical Characteristics
5.5
Switching Characteristics, VCCA = 1.8 ± 0.15V
5.6
Switching Characteristics, VCCA = 2.5 ± 0.2V
5.7
Switching Characteristics, VCCA = 3.3 ± 0.3V
5.8
Switching Characteristics, VCCA = 5.0 ± 0.5V
5.9
Switching Characteristics: Tsk, TMAX
6
Parameter Measurement Information
6.1
Load Circuit and Voltage Waveforms
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
7.3.1.1
Inputs with Integrated Static Pull-Down Resistors
7.3.2
Balanced High-Drive CMOS Push-Pull Outputs
7.3.3
VCC Disconnect
7.3.4
Over-Voltage Tolerant Inputs
7.3.5
Glitch-Free Power Supply Sequencing
7.3.6
Negative Clamping Diodes
7.3.7
Fully Configurable Dual-Rail Design
7.3.8
Supports High-Speed Translation
7.3.9
AC Noise Rejection
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Regulatory Requirements
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sces991_oa
1
Features
Supports DC shifts up to ±
80V
AC Noise Rejection of 140V
PP
up to 1MHz
CMTI of 250V/µs
Low Prop Delay (<5ns) and Ch-Ch Skew (<0.20ns)
Greater than 250Mbps
Low power consumption (0.8mA per channel at 1Mbps, 1.8V)
Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
4, 2, 1 channel devices with multiple configurations will be available
Two device variants:
TXG8020
: 2 forward
TXG8021
: 1 forward, 1 reverse
Supports V
CC
disconnect feature (I/Os are forced into high-Z)
Schmitt-trigger inputs allows for slow and noisy signals
Inputs with integrated static pull-down resistors prevent channels from floating
Operating temperature from –40°C to +125°C
Latch-up performance exceeds 100mA per JESD 78, class II
ESD protection exceeds JESD 22
2500V human-body model
500V charged-device model
Package options provided:
DSG (WSON-8)
DDF (SOT-8)
D (SOIC-8)
Simplified Diagram