SCES853E November   2013  – October 2023 TXS0104E-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements—VCCA = 1.8 V ± 0.15 V
    7. 6.7  Timing Requirements—VCCA = 2.5 V ± 0.2 V
    8. 6.8  Timing Requirements—VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics—VCCA = 1.8 V ± 0.15 V
    10. 6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V
    11. 6.11 Switching Characteristics—VCCA = 3.3 V ± 0.3 V
    12. 6.12 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Load Circuits
    2. 7.2 Voltage Waveforms
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Power Up
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pull Up and Pull Down Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
  12. 11Electrostatic Discharge Caution
  13. 12Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUT|12
  • PW|14
  • BQA|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

For reliability of the device, following common printed-circuit board layout guidelines is recommended.

  • Bypass capacitors should be used on power supplies.
  • Short trace lengths should be used to avoid excessive loading.
  • PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the source driver.
  • Placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of signals depending on the system requirements