SLUSDM7A April   2020  – May 2020 UCC21736-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Pin Configuration
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Propagation Delay
      1. 7.1.1 Regular Turn-OFF
    2. 7.2 Input Deglitch Filter
    3. 7.3 Active Miller Clamp
      1. 7.3.1 External Active Miller Clamp
    4. 7.4 Under Voltage Lockout (UVLO)
      1. 7.4.1 VCC UVLO
      2. 7.4.2 VDD UVLO
      3. 7.4.3 VEE UVLO
    5. 7.5 OC (Over Current) Protection
      1. 7.5.1 OC Protection with Soft Turn-OFF
    6. 7.6 ASC Protection
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Supply
      2. 8.3.2 Driver Stage
      3. 8.3.3 VCC, VDD and VEE Undervoltage Lockout (UVLO)
      4. 8.3.4 Active Pulldown
      5. 8.3.5 Short Circuit Clamping
      6. 8.3.6 External Active Miller Clamp
      7. 8.3.7 Overcurrent and Short Circuit Protection
      8. 8.3.8 Fault (FLT, Reset and Enable (RST/EN)
      9. 8.3.9 ASC Protection and APWM Monitor
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input filters for IN+, IN- and RST/EN
        2. 9.2.2.2 PWM Interlock of IN+ and IN-
        3. 9.2.2.3 FLT, RDY and RST/EN Pin Circuitry
        4. 9.2.2.4 RST/EN Pin Control
        5. 9.2.2.5 Turn on and turn off gate resistors
        6. 9.2.2.6 External Active Miller Clamp
        7. 9.2.2.7 Overcurrent and Short Circuit Protection
          1. 9.2.2.7.1 Protection Based on Power Modules with Integrated SenseFET
          2. 9.2.2.7.2 Protection Based on Desaturation Circuit
          3. 9.2.2.7.3 Protection Based on Shunt Resistor in Power Loop
        8. 9.2.2.8 Higher Output Current Using an External Current Buffer
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.12 Typical Characteristics

UCC21736-Q1 D016.gifFigure 4. Output High Drive Current vs. Temperature
UCC21736-Q1 D017.gifFigure 5. Output Low Driver Current vs. Temperature
UCC21736-Q1 D015.gif
1.
IN+ = High IN- = Low
Figure 6. IVCCQ Supply Current vs. Temperature
UCC21736-Q1 D014.gif
1.
IN+ = Low IN- = Low
Figure 7. IVCCQ Supply Current vs. Temperature
UCC21736-Q1 D018.gifFigure 8. IVCCQ Supply Current vs. Input Frequency
UCC21736-Q1 D012.gif
1.
IN+ = High IN- = Low
Figure 9. IVDDQ Supply Current vs. Temperature
UCC21736-Q1 D013.gif
1.
IN+ = Low IN- = Low
Figure 10. IVDDQ Supply Current vs. Temperature
UCC21736-Q1 D019.gif
1.
Figure 11. IVDDQ Supply Current vs. Input Frequency
UCC21736-Q1 D001.gifFigure 12. VCC UVLO vs. Temperature
UCC21736-Q1 D002.gifFigure 13. VDD UVLO vs. Temperature
UCC21736-Q1 D021.gif
1.
VCC = 3.3V VDD=18V CL = 100pF
RON = 0Ω ROFF = 0Ω
Figure 14. Propagation Delay tPDLH vs. Temperature
UCC21736-Q1 D022.gif
1.
VCC = 3.3V VDD=18V CL = 100pF
RON = 0Ω ROFF = 0Ω
Figure 15. Propagation Delay tPDHL vs. Temperature
UCC21736-Q1 D023.gif
1.
VCC = 3.3V VDD=18V CL = 10nF
RON = 0Ω ROFF = 0Ω
Figure 16. tr Rise Time vs. Temperature
UCC21736-Q1 D024.gif
1.
VCC = 3.3V VDD=18V CL = 10nF
RON = 0Ω ROFF = 0Ω
Figure 17. tf Fall Time vs. Temperature
UCC21736-Q1 D008.gifFigure 18. VOUTPD Output Active Pulldown Voltage vs. Temperature
UCC21736-Q1 D025.gif
1.
Figure 19. VCLP-OUT(H) Short Circuit Clamping Voltage vs. Temperature
UCC21736-Q1 D026.gif
1.
Figure 20. VCLP-OUT(L) Short Circuit Clamping Voltage vs. Temperature
UCC21736-Q1 D009.gifFigure 21. VCLMPTH Miller Clamp Threshold Voltage vs. Temperature
UCC21736-Q1 D010.gif
1.
Figure 22. ICLMPEL Miller Clamp Sink Current vs. Temperature
UCC21736-Q1 D011.gif
1.
Figure 23. tDCLMPE Miller Clamp ON Delay Time vs. Temperature
UCC21736-Q1 D003.gif
1.
Figure 24. VOCTH OC Detection Threshold vs. Temperature