SLUSC60B December   2017  – October 2019 UCC28064A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Principles of Operation
      2. 8.3.2  Natural Interleaving
      3. 8.3.3  On-Time Control, Maximum Frequency Limiting, Restart Timer and Input Voltage Feed-Forward compensation
      4. 8.3.4  Distortion Reduction
      5. 8.3.5  Zero-Current Detection and Valley Switching
      6. 8.3.6  Phase Management and Light-Load Operation
      7. 8.3.7  Burst Mode Operation
      8. 8.3.8  External Disable
      9. 8.3.9  Improved Error Amplifier
      10. 8.3.10 Soft Start
      11. 8.3.11 Brownout Protection
      12. 8.3.12 Line Dropout Detection
      13. 8.3.13 VREF
      14. 8.3.14 VCC
      15. 8.3.15 System Level Protections
        1. 8.3.15.1 Failsafe OVP - Output Over-voltage Protection
        2. 8.3.15.2 Overcurrent Protection
        3. 8.3.15.3 Open-Loop Protection
        4. 8.3.15.4 VCC Undervoltage Lock-Out (UVLO) Protection
        5. 8.3.15.5 Phase-Fail Protection
        6. 8.3.15.6 CS - Open, TSET - Open and Short Protection
        7. 8.3.15.7 Thermal Shutdown Protection
        8. 8.3.15.8 Fault Logic Diagram
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Inductor Selection
        3. 9.2.2.3  ZCD Resistor Selection RZA, RZB
        4. 9.2.2.4  HVSEN
        5. 9.2.2.5  Output Capacitor Selection
        6. 9.2.2.6  Selecting RS For Peak Current Limiting
        7. 9.2.2.7  Power Semiconductor Selection (Q1, Q2, D1, D2)
        8. 9.2.2.8  Brownout Protection
        9. 9.2.2.9  Converter Timing
        10. 9.2.2.10 Programming VOUT
        11. 9.2.2.11 Voltage Loop Compensation
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Input Ripple Current Cancellation with Natural Interleaving
        2. 9.2.3.2 Brownout Protection
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Package Option Addendum
    1. 12.1 Packaging Information
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
        1. 13.1.1.1 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overcurrent Protection

Under certain conditions (such as inrush, brownout-recovery, and output over-load) the PFC power stage sees large currents. It is critical that the power devices be protected from switching during these conditions.

The conventional current-sensing method uses a shunt resistor in series with each MOSFET source leg to sense the converter currents, resulting in multiple ground points and high power dissipation. Furthermore, since no current information is available when the MOSFETs are off, the source-resistor current-sensing method results in repeated turn-on of the MOSFETs during overcurrent (OC) conditions. Consequently, the converter may temporarily operate in continuous conduction mode (CCM) and may experience failures induced by excessive reverse-recovery currents in the boost diodes or other abnormal stresses.

The UCC28064A uses a single resistor to continuously sense the combined total inductor (input) current. This way, turn-on of the MOSFETs is completely avoided when the inductor currents are excessive. The gate drive to the MOSFETs is inhibited until total inductor current drops to near zero, precluding reverse-recovery-induced failures (these failures are most likely to occur when the AC-line recovers from a brownout condition).

The nominal OC threshold voltage during two-phase operation is -200 mV, which helps minimize losses. This threshold is automatically reduced to -166 mV during single-phase operation, either by detection of a phase failure or because COMP is below PHB.

An OC condition immediately turns off both gate-drive outputs, but does not trigger a soft-start and does not modify the error amplifier operation. The overcurrent condition is cleared when the total inductor current-sense voltage falls below the OC-clear threshold (–15 mV).

Following an overcurrent condition, both MOSFETs are turned on simultaneously once the input current drops to near zero. Because the two phase currents are temporarily operating in-phase, the current-sense resistance should be chosen so that OC protection is not triggered with twice the maximum current peak value of either phase to allow quick return to normal operation after an overcurrent event. Automatic phase-shift control will re-establish interleaving within a few switching cycles.