SLUSC60B December 2017 – October 2019 UCC28064A
The UCC28064A detects failure of either of the phases by monitoring the sequence of ZCD pulses. During normal two-phase operation, if one ZCD input remains idle for longer than approximately 400 µs while the other ZCD input switches normally, the over-current threshold is reduced to the value used for single phase operation (VCS_SPh). During normal single-phase operation, phase failure is not monitored. Phase failure is also not monitored when COMP is below approximately 250 mV.