SLVSJ11 August   2025 UCC57132 , UCC57138

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable/Fault (EN/FLT)
      3. 6.3.3 Driver Stage
      4. 6.3.4 Overcurrent (OC) Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 VDD Undervoltage Lockout
          2. 7.2.1.2.2 Power Dissipation
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Consideration
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.2 Enable/Fault (EN/FLT)

The EN/FLT pin of the UCC5713x can report a fault signal to the DSP/MCU with the adjustable fault clear time. When a fault is detected through the OCP pin, internal TSD, or the UVLO, the EN/FLT pin is pulled down to COM internally. The EN/FLT pin will stay low until the fault is removed and the internal pulldown FET turns off, the voltage on the pin charged up with external pull-up voltage. The tFLTC is determinded by the exponential charging characteristics of the capacitor where the time constant is set by RFLTC and CFLTC as shown in Simplified Application Diagram, the RFLTC is pulled up to external VDD. CFLTC is connected from EN/FLT to COM. EN/FLTis weakly pulled up to 5V internally through a RENU. The tFLTC can be calculated by the folumla below if it is pullup to 5V rail.

Equation 1. tFLTC=-RFLTC×RENURFLTC+RENU×CFLTC×ln⁡1-VENHVDD

The UCC5713x provides an enable function that can allow shutdown or enable the output. When the EN/FLT is pulled up above the VENH, the output is following IN, when it is pulled down below VENL, the output will stay low. The relationship for input, output and enable can be found in Timing Diagram.