SLUSFF2C September   2023  – December 2025 UCG28824 , UCG28826 , UCG28828

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Descriptions
      1. 7.3.1  HV - High Voltage Input
      2. 7.3.2  SW - Switch Node
      3. 7.3.3  GND – Ground Return
      4. 7.3.4  FLT - External Overtemperature Fault
      5. 7.3.5  FB ­­– Feedback
      6. 7.3.6  TR - Turns Ratio
      7. 7.3.7  IPK - Peak Current and Dithering
      8. 7.3.8  FCL - Frequency Clamp and Fault Response
      9. 7.3.9  CDX - CCM, Drive Strength, and X-cap Discharge
      10. 7.3.10 VCC - Input Bias
    4. 7.4 Feature Description
      1. 7.4.1  Self Bias and Auxless Sensing
      2. 7.4.2  Control Law
        1. 7.4.2.1 Valley Switching
        2. 7.4.2.2 Frequency Foldback
        3. 7.4.2.3 Burst Mode
        4. 7.4.2.4 Continuous Conduction Mode (CCM)
      3. 7.4.3  GaN HEMT Switching Capability
      4. 7.4.4  Soft Start
      5. 7.4.5  Frequency Clamp
      6. 7.4.6  Frequency Dithering
      7. 7.4.7  Slew Rate Control
      8. 7.4.8  Transient Peak Power Capability
      9. 7.4.9  X-Cap Discharge
      10. 7.4.10 Fault Protections
        1. 7.4.10.1 Brownout Protection
        2. 7.4.10.2 Short-Circuit Protection
        3. 7.4.10.3 Output Overvoltage Protection
        4. 7.4.10.4 Overpower Protection (OPP, LPS)
        5. 7.4.10.5 Overtemperature Protection
        6. 7.4.10.6 Open FB Protection
        7. 7.4.10.7 Error Codes for Protections
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Bulk Capacitor
        2. 8.2.2.2 Transformer Primary Inductance and Turns Ratio
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Selection Resistors
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REZ|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.1 Input Bulk Capacitor

The bulk capacitor includes one or more high voltage electrolytic capacitors in parallel at the output of the bridge rectifier. Capacitors are required for storing energy for the duration when instantaneous line input voltage reduces below the peak value while delivering rated output power. Input EMI filter design is outside the scope of this data sheet and not discussed.

Maintain a certain minimum input bulk capacitor voltage (VBULKmin) to prevent from triggering brown-out and providing sufficient power delivery capability. VBULKmin is assumed as 75V for this design. The minimum required input bulk capacitance (CIN) is estimated using Equation 5. The value depends on the rated input power, VBULKmin, min. AC line input voltage and the time duration for which this capacitor must support the output load, without reducing below VBULKmin.

Equation 5. CIN=2PIN×14fAC+12πfACarcsinVBULKmin2VACmin2VACmin2-VBULKmin2

Using above equation, min CIN value comes to 100μF for POUT of 65W, 93% efficiency at VACmin of 85VAC. Multiple capacitors can be used in parallel to realize this value to reduce total ESR and size of these capacitors.