JAJSFX3F august   2012  – april 2023 DLP9500

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  LVDS Timing Requirements
    8. 6.8  LVDS Waveform Requirements
    9. 6.9  Serial Control Bus Timing Requirements
    10. 6.10 Systems Mounting Interface Loads
    11. 6.11 Micromirror Array Physical Characteristics
    12. 6.12 Micromirror Array Optical Characteristics
    13. 6.13 Window Characteristics
    14. 6.14 Chipset Component Usage Specification
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DLPC410 - Digital Controller for DLP Discovery 4100 Chipset
      2. 7.3.2 DLPA200 - DMD Micromirror Drivers
      3. 7.3.3 DLPR410 - PROM for DLP Discovery 4100 Chipset
      4. 7.3.4 DLP9500 - DLP 0.95 1080p 2xLVDS Type-A DMD 1080p DMD
        1. 7.3.4.1 DLP9500 1080p Chipset Interfaces
          1. 7.3.4.1.1 DLPC410 Interface Description
            1. 7.3.4.1.1.1 DLPC410 IO
            2. 7.3.4.1.1.2 Initialization
            3. 7.3.4.1.1.3 DMD Device Detection
            4. 7.3.4.1.1.4 Power Down
          2. 7.3.4.1.2 DLPC410 to DMD Interface
            1. 7.3.4.1.2.1 DLPC410 to DMD IO Description
            2. 7.3.4.1.2.2 Data Flow
          3. 7.3.4.1.3 DLPC410 to DLPA200 Interface
            1. 7.3.4.1.3.1 DLPA200 Operation
            2. 7.3.4.1.3.2 DLPC410 to DLPA200 IO Description
          4. 7.3.4.1.4 DLPA200 to DLP9500 Interface
            1. 7.3.4.1.4.1 DLPA200 to DLP9500 Interface Overview
      5. 7.3.5 Measurement Conditions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Single Block Mode
      2. 7.4.2 Dual Block Mode
      3. 7.4.3 Quad Block Mode
      4. 7.4.4 Global Block Mode
    5. 7.5 Window Characteristics and Optics
      1. 7.5.1 Optical Interface and System Image Quality
      2. 7.5.2 Numerical Aperture and Stray Light Control
      3. 7.5.3 Pupil Match
      4. 7.5.4 Illumination Overfill
    6. 7.6 Micromirror Array Temperature Calculation
      1. 7.6.1 Thermal Test Points
      2. 7.6.2 Micromirror Array Temperature Calculation - Lumens Based
      3. 7.6.3 Micromirror Array Temperature Calculation - Power Density Based
      4. 7.6.4 59
    7. 7.7 Micromirror Landed-On and Landed-Off Duty Cycle
      1. 7.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 7.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 7.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 7.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Device Description
      2. 8.2.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
    1. 9.1 Power-Up Sequence (Handled by the DLPC410)
    2. 9.2 DMD Power-Up and Power-Down Procedures
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Impedance Requirements
      2. 10.1.2 PCB Signal Routing
      3. 10.1.3 Fiducials
      4. 10.1.4 PCB Layout Guidelines
        1. 10.1.4.1 DMD Interface
          1. 10.1.4.1.1 Trace Length Matching
        2. 10.1.4.2 DLP9500 Decoupling
          1. 10.1.4.2.1 Decoupling Capacitors
        3. 10.1.4.3 VCC and VCC2
        4. 10.1.4.4 DMD Layout
        5. 10.1.4.5 DLPA200
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
      2. 11.1.2 Device Marking
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.12 Micromirror Array Optical Characteristics

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
a Micromirror tilt angle DMD parked state (1) (2) (3), See Micromirror Landed Positions and Light Paths section 0 degrees
DMD landed state (1) (4) (5)
See Micromirror Landed Positions and Light Paths section		 12
β Micromirror tilt angle variation (1) (4) (6) (7) (8) See Micromirror Landed Positions and Light Paths section -1 1 degrees
Micromirror crossover time (9) 3 µs
Micromirror switching time (10) 12.5 µs
Array switching time at 400 MHz with global reset (11) 56 µs
Non-operating micromirrors (12) Non-adjacent micromirrors 10 micromirrors
Adjacent micromirrors 0
Orientation of the micromirror axis-of-rotation (13) See Micromirror Landed Positions and Light Paths section 44 45 46 degrees
Micromirror array optical efficiency (14) (15) 400 to 700 nm, with all micromirrors in the ON state 70%
(1) Measured relative to the plane formed by the overall micromirror array.
(2) Parking the micromirror array returns all of the micromirrors to an essentially flat (0°) state (as measured relative to the plane formed by the overall micromirror array).
(3) When the micromirror array is parked, the tilt angle of each individual micromirror is uncontrolled.
(4) Additional variation exists between the micromirror array and the package datums, as shown in Mechanical, Packaging and Orderable Information.
(5) When the micromirror array is landed, the tilt angle of each individual micromirror is dictated by the binary contents of the CMOS memory cell associated with each individual micromirror. A binary value of 1 results in a micromirror landing in an nominal angular position of +12°. A binary value of 0 results in a micromirror landing in an nominal angular position of –12°.
(6) Represents the landed tilt angle variation relative to the nominal landed tilt angle.
(7) Represents the variation that can occur between any two individual micromirrors, located on the same device or located on different devices.
(8) For some applications, it is critical to account for the micromirror tilt angle variation in the overall system optical design. With some system optical designs, the micromirror tilt angle variation within a device may result in perceivable non-uniformities in the light field reflected from the micromirror array. With some system optical designs, the micromirror tilt angle variation between devices may result in colorimetry variations and/or system contrast variation.
(9) Micromirror crossover time is the transition time from landed to landed during a crossover transition and primarily a function of the natural response time of the micromirrors.
(10) Micromirror switching time is the time after a micromirror clocking pulse until the micromirrors can be addressed again. It included the micromirror settling time.
(11) Array switching is controlled and coordinated by the DLPC410 (DLPS024) and DLPA200 (DLPS015). Nominal switching time depends on the system implementation and represents the time for the entire micromirror array to be refreshed (array loaded plus reset and mirror settling time).
(12) Non-operating micromirror is defined as a micromirror that is unable to transition nominally from the –12° position to +12° or vice versa.
(13) Measured relative to the package datums 'B' and 'C', shown in the Mechanical, Packaging and Orderable Information.
(14) The minimum or maximum DMD optical efficiency observed in a specific application depends on numerous application-specific design variables, such as:
  • Illumination wavelength, bandwidth/line-width, degree of coherence
  • Illumination angle, plus angle tolerance
  • Illumination and projection aperture size, and location in the system optical path
  • Illumination overfill of the DMD micromirror array
  • Aberrations present in the illumination source and/or path
  • Aberrations present in the projection path

The specified nominal DMD optical efficiency is based on the following use conditions:
  • Visible illumination (400 to 700 nm)
  • Input illumination optical axis oriented at 24° relative to the window normal
  • Projection optical axis oriented at 0° relative to the window normal
  • ƒ / 3 illumination aperture
  • ƒ / 2.4 projection aperture

Based on these use conditions, the nominal DMD optical efficiency results from the following four components:
  • Micromirror array fill factor: nominally 94%
  • Micromirror array diffraction efficiency: nominally 87%
  • Micromirror surface reflectivity: nominally 89%
  • Window transmission: nominally 96% (single pass, through two surface transitions)
(15) Does not account for the effect of micromirror switching duty cycle, which is application dependent. Micromirror switching duty cycle represents the percentage of time that the micromirror is actually reflecting light from the optical illumination path to the optical projection path. This duty cycle depends on the illumination aperture size, the projection aperture size, and the micromirror array update rate.