JAJSG60C September 2018 – April 2024 DP83869HM
PRODUCTION DATA
The DP83869HM supports an IEEE 1588 indication pulse at the SFD (start frame delimiter) for the receive and transmit paths. The pulse can be delivered to various pins. The pulse indicates the actual time the symbol is presented on the lines (for transmit), or the first symbol received (for receive). The exact timing of the pulse can be adjusted through register. Each increment of phase value is an 8-ns step.
The SFD pulse output can be configured using the GPIO Mux Control register GPIO_MUX_CTRL (register address 1E0h). The ENHANCED_MAC_SUPPORT bit in RXCFG (register address 134h) must also be set to allow output of the SFD.