JAJSKC5
February 2021
DS160PR421
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
DC Electrical Characteristics
6.6
High Speed Electrical Characteristics
6.7
SMBUS/I2C Timing Charateristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Linear Equalization
7.3.2
Flat Gain
7.3.3
Receiver Detect State Machine
7.4
Device Functional Modes
7.4.1
Active PCIe Mode
7.4.2
Active Buffer Mode
7.4.3
Standby Mode
7.5
Programming
7.5.1
Control and Configuration Interface
7.5.1.1
Pin Mode
7.5.1.1.1
Four-Level Control Inputs
7.5.1.2
SMBUS/I2C Register Control Interface
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
PCIe x8 Lane Switching
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Pin-to-pin Passive versus Redriver Option
8.2.1.4
Application Curves
8.2.2
DisplayPort Application
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
11
Layout Example
12
Device and Documentation Support
12.1
ドキュメントの更新通知を受け取る方法
12.2
サポート・リソース
12.3
Trademarks
12.4
静電気放電に関する注意事項
12.5
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RUA|42
MPQF210D
サーマルパッド・メカニカル・データ
RUA|42
QFND142D
発注情報
jajskc5_oa
6.8
Typical Characteristics
Figure 6-1
Typical EQ Boost vs Frequency
Figure 6-2
Typical EQ Boost over Voltage and Temperature with EQ=15
Figure 6-3
Typical RX Differential Return Loss
Figure 6-4
Typical TX Differential Return Loss
Figure 6-5
Typical Jitter Characteristics -
Top:
16Gbps PRBS15 Input to the Device,
Bottom:
Output of the Device.