JAJSE60B November   2017  – September 2019 ISOW7821

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V Input, 5-V Output
    10. 7.10 Supply Current Characteristics—5-V Input, 5-V Output
    11. 7.11 Electrical Characteristics—5-V Input, 3.3-V Output
    12. 7.12 Supply Current Characteristics—5-V Input, 3.3-V Output
    13. 7.13 Electrical Characteristics—3.3-V Input, 3.3-V Output
    14. 7.14 Supply Current Characteristics—3.3-V Input, 3.3-V Output
    15. 7.15 Switching Characteristics—5-V Input, 5-V Output
    16. 7.16 Switching Characteristics—5-V Input, 3.3-V Output
    17. 7.17 Switching Characteristics—3.3-V Input, 3.3-V Output
    18. 7.18 Insulation Characteristics Curves
    19. 7.19 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Current Limit, Thermal Overload Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
        1. 10.2.3.1 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.1 Overview

The ISOW7821 device comprises a high-efficiency, low-emissions isolated DC-DC converter and two high-speed isolated data channels. Figure 26 shows the functional block diagram of the ISOW7821 device.

The integrated DC-DC converter uses switched mode operation and proprietary circuit techniques to reduce power losses and boost efficiency. Specialized control mechanisms, clocking schemes, and the use of a high-Q on-chip transformer provide high efficiency and low radiated emissions. The integrated transformer uses thin film polymer as the insulation barrier.

The VCC supply is provided to the primary power controller that switches the power stage connected to the integrated transformer. Power is transferred to the secondary side, rectified and regulated to either 3.3 V or 5 V, depending on the SEL pin. The output voltage, VISO, is monitored and feedback information is conveyed to the primary side through a dedicated isolation channel. The duty cycle of the primary switching stage is adjusted accordingly. The fast feedback control loop of the power converter ensures low overshoots and undershoots during load transients. Undervoltage lockout (UVLO) with hysteresis is integrated on the VCC and VISO supplies which ensures robust system performance under noisy conditions. An integrated soft-start mechanism ensures controlled inrush current and avoids any overshoot on the output during power up.

The integrated signal-isolation channels employ an ON-OFF keying (OOK) modulation scheme to transmit the digital data across a silicon-dioxide based isolation barrier. The transmitter sends a high-frequency carrier across the barrier to represent one state and sends no signal to represent the other state. The receiver demodulates the signal after signal conditioning and produces the output through a buffer stage. The signal-isolation channels incorporate advanced circuit techniques to maximize the CMTI performance and minimize the radiated emissions from the high frequency carrier and IO buffer switching. Figure 27 shows a functional block diagram of a typical signal isolation channel.

The ISOW7821 device is suitable for applications that have limited board space and require more integration. These devices are also suitable for very-high voltage applications, where power transformers meeting the required isolation specifications are bulky and expensive.