JAJSE60B November 2017 – September 2019 ISOW7821
The ISOW7821 device has built-in UVLO on the VCC and VISO supplies with positive-going and negative-going thresholds and hysteresis. When the VCC voltage crosses the positive-going UVLO threshold during power-up, the DC-DC converter initializes and the power converter duty cycle is increased in a controlled manner. This soft-start scheme limits primary peak currents drawn from the VCC supply and charges the VISO output in a controlled manner, avoiding overshoots. Outputs of the isolated data channels are in an indeterminate state until the VCC or VISO voltage crosses the positive-going UVLO threshold. When the UVLO positive-going threshold is crossed on the secondary side VISO pin, the feedback data channel starts providing feedback to the primary controller. The regulation loop takes over and the isolated data channels go to the normal state defined by the respective input channels or their default states. Design should consider a sufficient time margin (typically 10 ms with 10-µF load capacitance) to allow this power up sequence before valid data channels are accounted for system functionality.
When VCC power is lost, the primary side DC-DC controller turns off when the UVLO lower threshold is reached. The VISO capacitor then discharges depending on the external load. The isolated data outputs on the VISO side are returned to the default state for the brief time that the VISO voltage takes to discharge to zero.