SLVSES8A October   2020  – December 2020 LM5127-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Enable (EN, VCC_HOLD)
      2. 8.3.2  Dual Input VCC Regulator (BIAS, VCCX, VCC)
      3. 8.3.3  Dual Input VDD Switch (VDD, VDDX)
      4. 8.3.4  Device Configuration and Light Load Switching Mode Selection (CFG/MODE)
      5. 8.3.5  Fixed or Adjustable Output Regulation Target (VOUT, FB)
      6. 8.3.6  Overvoltage Protection (VOUT, FB)
      7. 8.3.7  Power Good Indicator (PGOOD)
      8. 8.3.8  Programmable Switching Frequency (RT)
      9. 8.3.9  External Clock Synchronization (SYNC)
      10. 8.3.10 Programmable Spread Spectrum (DITHER)
      11. 8.3.11 Programmable Soft Start (SS)
      12. 8.3.12 Fast Re-start using VCC_HOLD (VCC_HOLD)
      13. 8.3.13 Transconductance Error Amplifier and PWM (COMP)
      14. 8.3.14 Current Sensing and Slope Compensation (CSA, CSB)
      15. 8.3.15 Constant Peak Current Limit (CSA, CSB)
      16. 8.3.16 Maximum Duty Cycle and Minimum Controllable On-time Limits (Boost)
      17. 8.3.17 Bypass Mode (Boost)
      18. 8.3.18 Minimum Controllable On-time and Minimum Controllable Off-time Limits (Buck)
      19. 8.3.19 Low Dropout Mode for Extended Minimum Input Voltage (Buck)
      20. 8.3.20 Programmable Hiccup Mode Overload Protection (RES)
      21. 8.3.21 MOSFET Drivers and Hiccup Mode Fault Protection (LO, HO, HB)
      22. 8.3.22 Battery Monitor (BMOUT, BMIN_FIX, BMIN_PRG)
      23. 8.3.23 Dual-phase Interleaved Configuration for High Current Supply (CFG)
      24. 8.3.24 Thermal Shutdown Protection
      25. 8.3.25 External VCCX Supply Reduces Power Dissipation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Status
        1. 8.4.1.1 Shutdown Mode
        2. 8.4.1.2 Configuration Mode
        3. 8.4.1.3 Active Mode
        4. 8.4.1.4 Sleep Mode
        5. 8.4.1.5 Deep Sleep Mode
          1. 8.4.1.5.1 Cutting Leakage Path in Deep Sleep Mode (DIS, SLEEP1, SENSE1)
        6. 8.4.1.6 VCC HOLD Mode
      2. 8.4.2 Light Load Switching Mode
        1. 8.4.2.1 Forced PWM (FPWM) Operation
        2. 8.4.2.2 Diode Emulation (DE) Operation (Connect RSS at SS)
        3. 8.4.2.3 Forced Diode Emulation Operation in FPWM Mode
        4. 8.4.2.4 Skip Mode Operation
      3. 8.4.3 LM5127 Cheat Sheet
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Recommended Power Tree Architecture
        2. 9.2.2.2 Application Ideas
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.17 Bypass Mode (Boost)

In boost configuration when the boost channel is used as a pre-boost, bypass mode operation is useful to reduce the losses of the high-side MOSFET when the converter input voltage is higher than the converter output regulation target. The device supports bypass mode operation by using an internal charge pump which is enabled in active mode. Because the internal charge pump generates VBIAS + 5 V to supply HB1, the BIAS pin should be connected to the output or input of the boost converter to supply enough voltage to HB1 when the converter input voltage is higher than the converter output regulation target.

During CCM operation or when the device is configured in FPWM mode, the high-side driver naturally turns on 100% without any replenish switching when the required on-time becomes less than zero and the input voltage is greater than the target output voltage. If the input supply voltage satisfies the following inequality in CCM, the boost channel starts random pulse skipping and eventually enters bypass mode.

Equation 14. GUID-D670FB80-6E8E-4897-A8F5-C24A6522F94E-low.gif
Table 8-3 Typical Boost Input Supply Voltage to Start Pulse Skipping in CCM
7-V OUTPUT8.5-V OUTPUT
fSW = 440 kHz> 6.8 - 6.9 V > 8.2 - 8.3 V
fSW = 2.2 MHz> 5.9 - 6.0 V > 7.2 - 7.3 V

During DCM operation, the device enters the bypass mode 16 cycles after the FB1 pin voltage is greater than VOVTH. In this bypass mode, the device turns on the high-side driver 100% by force.

GUID-3002A986-1145-4800-9A82-5F9F657B249B-low.gifFigure 8-17 PWM to Bypass Mode Transition (a) During CCM
GUID-67F60443-D8EF-409F-BD09-1793D7367B5C-low.gifFigure 8-18 PWM to Bypass Mode Transition (b) During DCM
Table 8-4 Switching Operation in Boost Configuration
CONDITION LIGHT LOAD SWITCHING MODE
SKIP MODE DIODE EMULATION (USE RSS IN FPWM) FPWM MODE
VSUPPLY > VLOAD Enters bypass mode (HO turns on 100%) when FB1 > VOVTH. During CCM, HO turns on 100% if the required on-time is zero.
VSUPPLY ≈ VLOAD or at light load condition Once LO driver turns on, the device keeps the LO driver on until the minimum peak current limit is satisfied. Random pulse skipping happens when the required peak current is less than the minimum peak current. Random pulse skipping happens when the required on-time is less than the minimum on-time.
VSUPPLY < VLOAD PWM operation with diode emulation PWM operation in FPWM mode
VSUPPLY << VLOAD Out-of-regulation when the required duty cycle is greater than the maximum duty cycle limit