SNOSCZ1B July   2015  – June 2016 LM74610-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 During T0
      2. 7.3.2 During T1
      3. 7.3.3 Pin Operation
        1. 7.3.3.1 Anode and Cathode Pins
        2. 7.3.3.2 VcapH and VcapL Pins
        3. 7.3.3.3 Gate Drive Pin
        4. 7.3.3.4 Gate Pull Down Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Duty Cycle Calculation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 Startup Voltage
        3. 8.2.2.3 Capacitor Selection
        4. 8.2.2.4 MOSFET Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Selection of TVS Diodes in Automotive Reverse Polarity Applications
      5. 8.2.5 OR-ing Application Configuration
      6. 8.2.6 Design Requirements
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Cathode to Anode (for a 2-ms time duration) (2), (3) -3 45 V
Cathode to Anode (continuous)(3) -3 42 V
VcapH to VcapL -0.3 7 V
Anode to VcapL -0.3 3 V
Gate drive, gate pull down to VcapL -0.3 7 V
Ambient temperature, TA-MAX(4) -40 125 °C
Case temperature, TC-MAX -40 125 °C
Storage temperature, Tstg -65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) 42V continuous (and 45V transients for 2ms) absmax condition from Cathode to Anode. Suitable to use with TVS SMBJ28A and SMBJ14A at the anode.
(3) Reverse voltage rating only. There is no positive voltage limitation for the LM74610-Q1 Anode terminal.
(4) The device performance is ensured over this Ambient Temperature range as long the Case Temperature does not exceed the MAX value.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge(1) Human body model (HBM), per AEC Q100-002(2) ±4000 V
Charged-device model (CDM), per AEC Q100-011 ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Cathode To Anode 42 V
Ambient temperature, TA-MAX -40 125 °C
Case temperature, TC-MAX 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LM74610-Q1 UNIT
VSSOP (DGK)
8 PINS
RθJA Junction-to-ambient thermal resistance 181 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73 °C/W
RθJB Junction-to-board thermal resistance 102 °C/W
ψJT Junction-to-top characterization parameter 11 °C/W
ψJB Junction-to-board characterization parameter 100 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

TA= 25°C unless otherwise noted. Minimum and maximum limits are specified through test, design, validation or statistical correlation. Typical values represent the most likely parametric norm at TA= 25°C and are provided for reference purpose only. VAnode-Cathode= 0.55 V for all tests.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VAnode to Cathode Minimum startup voltage across external MOSFET's body diode External MOSFET VGS = 0V 0.48 V
Vcap Threshold Charge pump capacitor drive thresholds Vcap Upper Threshold 6.3 V
Vcap Lower Threshold 5.15 V
IGate up Gate drive pull up current VGate to Anode = 2 V 8.9 9.4 µA
IGate down Gate drive pull down current during forward voltage VGate to Anode = 4 V 6.35 6.8 µA
IGate pull down Gate drive pull down current when reverse voltage is sensed VGate Pull Down = VAnode + 2 V 160 mA
ICharge Current Charging current for the charge pump capacitor VAnode to Cathode = 0.55 V 40 46 µA
IDischarge Current VCAP current consumption to power the controller when MOSFET is ON Vcap = 6.6 V 0.95 µA
TRecovery Time to shut off MOSFET when voltage is reversed (Equivalent to diode reverse recovery time) VAnode to Cathode = -20 mV
Cgate = 4 nF		 2.2 5(2) µs
D Duty cycle Iload = 3 A, TA = 25°C 98%
Iload = 3 A, TA = 125°C 92%
ILKG Reverse leakage current VAnode to Cathode = -13.5 V 60 110(2) µA
Iq Quiescent current to GND 0 µA
IAnode Current into Anode pin Current into Anode pin when VAnode - Cathode = 0.3V. 30 µA
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the table of Electrical Characteristics.
(2) Limit applies over the full Operating Temperature Range TA = -40°C to +125°C.
LM74610-Q1 timing_of_gate_snoscz1.gif Figure 1. Gate Shut Down Timing in the Event of Reverse Polarity

6.6 Typical Characteristics

LM74610-Q1 D001_reverse_leakage_SNOSCZ1.gif Figure 2. Reverse Leakage at Negative Voltages
LM74610-Q1 D009_trecovery_real_SNOSCZ1.gif Figure 4. Reverse Recovery Time (TRecovery)
LM74610-Q1 D005_duty_cycle_1_SNOSCZ1.gif Figure 6. Duty Cycle of the Output Voltage at Startup
LM74610-Q1 D002_anode_to_cathode_startup_SNOSCZ1.gif Figure 3. Anode to Cathode Startup Voltage
LM74610-Q1 D003_vcap_SNOSCZ1.gif Figure 5. VcapH and VcapL Voltage Threshold
LM74610-Q1 D004_t_recovery_over_temp_SNOSCZ1.gif Figure 7. Duty Cycle of the Output Voltage
LM74610-Q1 D010_vcap_charging_current_SNOSCZ1.gif Figure 8. Voltage Across Body Diode vs Vcap Charging Current