JAJSED9U June 2007 – January 2018 LP3907
PRODUCTION DATA.
This register allows the Buck switcher clock frequency to be spread across a wider range, allowing for less Electro-magnetic Interference (EMI). The spread spectrum modulation frequency refers to the rate at which the frequency ramps up and down, centered at 2 MHz.
This register also allows dynamic scaling of the nPOR Delay Timing. The LP3907 is equipped with an internal POR circuit which monitors the output voltage levels on the buck regulators, allowing the user to more actively monitor the power status of the chip.
The UVLO feature continuously monitor the raw input supply voltage (VINLDO12) and automatically disables the four voltage regulators whenever this supply voltage is less than 2.8 VDC. This prevents the user from damaging the power source (such as battery), but can be disabled if the user wishes.
Note that if the supply to VDD_M is close to 2.8 V with a heavy load current on the regulators, the chip is in danger of powering down due to UVLO. If the user wishes to keep the chip active under those conditions, enable the Bypass UVLO feature.
D7-D5 | D4 | D3-D2 | D1 | D0 | |
---|---|---|---|---|---|
Name | — | BP_UVLO | TPOR | BK_SLOMOD | BK_SSEN |
Access | — | R/W | R/w | R/W | R/W |
Data | Reserved | Bypass UVLO monitoring
0 - Allow UVLO 1 - Disable UVLO |
nPOR Delay Timing
00 - 50 µs 01 - 50 ms 10 - 100 ms 11 - 200 ms |
Buck Spread Spectrum Modulation
0 – 10 kHz triangular wave 1 – 2 kHz triangular wave |
Spread Spectrum Function Output
0 – Disabled 1 – Enabled |
Reset | 000 | Factory-Programmed Default | 01 | 1 | 0 |