JAJSPJ0C August   2005  – December 2022 SN74LVCH8T245

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    7. 6.7  Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    8. 6.8  Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics: VCCA = 5 V ± 0.5 V
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fully Configurable Dual-Rail Design
      2. 8.3.2 Partial-Power-Down Mode Operation
      3. 8.3.3 Active Bus Hold Circuitry
      4. 8.3.4 Balanced High-Drive CMOS Push-Pull Outputs
      5. 8.3.5 VCC Isolation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Enable Times
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Power Supply Recommendations

The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the OE input is high, all outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until VCCA and VCCB are fully ramped and stable. The minimum value of the pullup resistor to VCCA is determined by the current-sinking capability of the driver.

VCCA or VCCB can be powered up first. If the SN74LVCH8T245 is powered up in a permanently enabled state
(for example OE is always kept low), pullup resistors are recommended at the input. This ensures proper, glitch-free, power-up. For more information, see Designing with SN4LVCXT245 and SN74LVCHXT245 Family of Direction Controlled Voltage Translators/Level-Shifters. In addition, the OE pin may be shorted to GND if the application does not require use of the high-impedance state at any time.