JAJSFG7K
July 1999 – May 2024
THS4031
,
THS4032
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information - THS4031
5.5
Thermal Information - THS4032
5.6
Electrical Characteristics - THS4031, RL = 150Ω
5.7
Electrical Characteristics - THS4031, RL = 1kΩ
5.8
Electrical Characteristics - THS4032, RL = 150Ω
5.9
Electrical Characteristics - THS4032, RL = 1kΩ
5.10
Typical Characteristics - THS4031
5.11
Typical Characteristics - THS4032
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Offset Nulling
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Driving a Capacitive Load
7.1.2
Low-Pass Filter Configurations
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Selection of Multiplexer
7.2.2.2
Signal Source
7.2.2.3
Driving Amplifier
7.2.2.4
Driving Amplifier Bandwidth Restriction
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
General PowerPAD™ Integrated Circuit Package Design Considerations
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
商標
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DGN|8
MPDS046F
サーマルパッド・メカニカル・データ
DGN|8
PPTD041I
発注情報
jajsfg7k_oa
jajsfg7k_pm
7.2.3
Application Curves
Figure 7-6
SNR vs Filter Capacitor
Figure 7-8
Input to ADC for Various Values of Filter Capacitors
Figure 7-7
Crosstalk vs Filter Capacitor