JAJSHY0D August 2019 – August 2020 TPS23882
PRODUCTION DATA
COMMAND = 21h with 1 Data Byte, Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
POL4_7 | POL4_6 | POL4_5 | POL4_4 | POL4_3 | POL4_2 | POL4_1 | POL4_0 |
R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7–0 | POLn_7- POLn_0 | R/W | 1 | 1-byte defining 2-Pair PCUTminimum threshold.
The equation defining the PCUT is: PCUT = (N × PCSTEP) Where, when assuming 0.200-Ω Rsense resistor is used: PCSTEP = 0.5 W |
These bits set the minimum threshold for the design. Internally, the typical PCUT threshold is set slightly above this value to ensure that the device does not trip a Pcut fault at or below the set value in this register due to part to part or temperature variation.
The contents of this register is reset to 0xFFh anytime the port is turned off or disabled either due to fault condition or user command
Programmed values of less than 2W are not supported. If a value of less than 2W is programmed into these registers, the device will use 2W as the 2-pair Policing value.
Power Policing:
The TPS23882 implements a true Power Policing limit, where the device will adjust the policing limit based on both voltage and current variation in order to ensure a reliable power limit.
In Semi Auto and Auto modes, these bits are automatically set during power on based on the assigned class (see tables below). If an alternative value is desired, it needs to be set after the PEn bit is set in 0x10h, or it may also be configured prior to port turn on in combination with the use of the MPOLn bits in register 0x40 (see Section 9.6.2.45).
Assigned Class | POLn7-0 Settings | Minimum Power |
---|---|---|
Class 1 | 0000 1000 | 4W |
Class 2 | 0000 1110 | 7W |
Class 3 | 0001 1111 | 15.5W |
Class 4 | 0011 1100 | 30W |