JAJSGC8B October   2018  – January 2020 TPS25982

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 デバイス比較表
  6. 6 概要 (続き)
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Protection (UVLO and UVP)
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 9.3.3.1 Slew Rate and Inrush Current Control (dVdt)
        2. 9.3.3.2 Circuit Breaker
        3. 9.3.3.3 Active Current Limiting
        4. 9.3.3.4 Short-Circuit Protection
      4. 9.3.4 Overtemperature Protection (OTP)
      5. 9.3.5 Analog Load Current Monitor (IMON)
      6. 9.3.6 Power Good (PG)
      7. 9.3.7 Load Detect/Handshake (LDSTRT)
    4. 9.4 Fault Response
    5. 9.5 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application: Standby Power Rail Protection in Datacenter Servers
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Device Selection
        2. 10.2.2.2 Setting the Current Limit Threshold: RILIM Selection
        3. 10.2.2.3 Setting the Undervoltage Lockout Set Point
        4. 10.2.2.4 Choosing the Current Monitoring Resistor: RIMON
        5. 10.2.2.5 Setting the Output Voltage Ramp Time (TdVdt)
          1. 10.2.2.5.1 Case 1: Start-Up Without Load: Only Output Capacitance COUT Draws Current
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance COUT and Load Draw Current
        6. 10.2.2.6 Setting the Load Handshake (LDSTRT) Delay
        7. 10.2.2.7 Setting the Transient Overcurrent Blanking Interval (tITIMER)
        8. 10.2.2.8 Setting the Auto-Retry Delay and Number of Retries
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Optical Module Power Rail Path Protection
        1. 10.3.1.1 Design Requirements
        2. 10.3.1.2 Device Selection
        3. 10.3.1.3 External Component Settings
        4. 10.3.1.4 Voltage Drop
        5. 10.3.1.5 Application Curves
      2. 10.3.2 Input Protection for 12-V Rail Applications: PCIe Cards, Storage Interfaces and DC Fans
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
        1. 13.1.1.1 関連リンク
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.3.1 Optical Module Power Rail Path Protection

Optical modules are commonly used in high-bandwidth data communication systems such as Optical Networking equipment, Enterprise/Data-Center Switches and Routers. Several variants of optical modules are available in the market, which differ in the form-factor and the data speed support (Gbit/s). Of these, the popular variant Double Dense Quad Small Form-factor Pluggable (QSFP-DD) module supports speeds up to 400 Gbit/s. In addition to the system protection during hot-plug events, the other key requirement for optical module is the tight voltage regulation. The optical module uses 3.3 V supply and requires voltage regulation within ±5 % for proper operation.

A typical power tree of such system is shown in Figure 64. The optical line card consists of DC-DC converter, protection device (eFuse) and power supply filters. The DC-DC converter steps-down the 12 V to 3.3 V and maintains the 3.3 V rail within ±2 %. The power supply filtering network uses ‘LC’ components to reduce high frequency noise injection into the optical module. The DC resistance of the inductor ‘L’ causes voltage drop of around 1.5 % which leaves us with a voltage drop budget of just 1.5 % (3.3 V * 1.5% = 50 mV) across the protection device. Considering a maximum load current of 5.5 A per module, the maximum ON-resistance of the protection device should be less than 9 mΩ. TPS25982 eFuse offers ultra-low ON-resistance of 2.7 mΩ (typical) and 4.5 mΩ (maximum, across temperature), thereby meeting the target specification with additional margin to spare and simplifying the overall system design.

TPS25982 Optical_module_power-tree.gifFigure 64. Power Tree Block Diagram of a Typical Optical Line Card

As shown in Figure 64, ModPrsL signal acts as a handshake signal between the line card and the optical module. ModPrsL is always pulled to ground inside the module. When the module is hot-plugged into the host “Optical Line Card” connector, the ModPrsL signal pulls down the LDSTRT pin and enables the TPS25982 eFuse to power the module. This ensures that power is applied on the port only when a module is plugged in and disconnected when there is no module present.

TPS25982 Application_optical-module.gifFigure 65. TPS259822O Configured for a 3.3-V Power Rail Path Protection in Optical Module