JAJSOU6 October   2023 TPS2HCS10-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1. 5.1 Recommended Connections for Unused Pins
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protection Mechanisms
        1. 8.3.1.1 Programmable Fuse Protection
        2. 8.3.1.2 Thermal Shutdown
        3. 8.3.1.3 Overcurrent Protection And Capacitive Load Charging
        4. 8.3.1.4 Reverse Battery
      2. 8.3.2 Diagnostic Mechanisms
        1. 8.3.2.1 VOUT Short-to-Battery and Open-Load
          1. 8.3.2.1.1 Detection With Channel Output (FET) Enabled
          2. 8.3.2.1.2 Detection With Channel Output Disabled
        2. 8.3.2.2 Digital Current Sense Output
          1. 8.3.2.2.1 RSNS Value and Accuracy / Resolution of Current Measurement
            1. 8.3.2.2.1.1 High Accuracy Load Current Sense
            2. 8.3.2.2.1.2 SNS Output Filter
        3. 8.3.2.3 Output Voltage and FET Temperature Sensing
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 SLEEP
      3. 8.4.3 CONFIG/ACTIVE
      4. 8.4.4 Battery Supply Input (VBB) Under-voltage
      5. 8.4.5 LOW POWER MODE (LPM) State
      6. 8.4.6 LIMP HOME state
      7. 8.4.7 SPI Mode Operation
    5. 8.5 TPS2HC10S Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Switching Characteristics

Over operating junction temperatures,  TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX
UNIT
tDR1 Channel turnon delay time VS = 13.5 V, RL = 2 Ω, 50% of CS to 10% of VOUT, default slew rate                  8               30 45 µs
tDF1 Channel turnoff delay time VS = 13.5 V, RL = 2 Ω 50% of CS/EN to 90% of VOUT default slew rate 10 20 30 µs
SRR
VOUT rising slew rate

 VBB = 13.5 V, 20% to 80% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 11		 0.55 V/µs
VBB = 13.5 V, 20% to 80% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 10		 0.45 V/µs
VBB = 13.5 V, 20% to 80% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 01		 0.34 V/µs
VBB = 13.5 V, 20% to 80% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 00		 0.25 V/µs
SRF VOUT falling slew rate VBB = 13.5 V, 80% to 20% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 11		 0.56 V/µs
VBB = 13.5 V, 80% to 20% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 10		 0.42 V/µs
VBB = 13.5 V, 80% to 20% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 01		 0.30 V/µs
VBB = 13.5 V, 80% to 20% of VOUT,
RL = 2 Ω Slew Rate Setting (SLRT_CHx) = 00		 0.21 V/µs
tON Channel turnon time SLRT_CHx=10 (default) 40 53 70 µs
tOFF Channel turnoff time SLRT_CHx=10 (default) 30 36 50 µs
tON - tOFF
Turnon and off matching

 1 ms ON time switch enable pulse, VBB = 13.5 V, RL = 2 Ω –10 30 µs
200-µs OFF time switch enable pulse, VBB = 13.5 V, RL = 2 Ω, frequency = 1 kHz –20 20 µs
200-µs ON time switch enable pulse, VS = 13.5 V, RL = 2 Ω, frequency = 1 kHz –15 –4 5 µs
EON
Switching energy losses during
turnon

 VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from 0 to VS  Slew Rate Setting (SLRT_CHx) = 11 0.4 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from 0 to VS  Slew Rate Setting (SLRT_CHx) = 10 0.5 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from 0 to VS  Slew Rate Setting (SLRT_CHx) = 01 0.65 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from 0 to VS  Slew Rate Setting (SLRT_CHx) = 00 0.9 mJ
EOFF
Switching energy losses during
turnoff

 VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from VS to 0  Slew Rate Setting (SLRT_CHx) = 11 0.37 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from VS to 0  Slew Rate Setting (SLRT_CHx) = 10 0.48 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from VS to 0  Slew Rate Setting (SLRT_CHx) = 01 0.68 mJ
VS = 13.5 V, RL = 2 Ω, 1 ms pulse - VOUT from VS to 0  Slew Rate Setting (SLRT_CHx) = 00 0.9 mJ