JAJSGZ1C September 2015 – February 2019 TPS65094
PRODUCTION DATA.
All xx_DIS[1:0] bits automatically set to 00 when the corresponding VR is enabled. Discharge resistance values listed here are approximate.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Bit Name | RESERVED | RESERVED | RESERVED | RESERVED | SWB1_DIS[1] | SWB1_DIS[0] | LDOA3_DIS[1] | LDOA3_DIS[0] |
TPS65094x | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
Access | R | R | R/W | R/W | R/W | R/W | R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
3–2 | SWB1_DIS[1:0] | R/W | 01 | SWB1 discharge resistance
00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω |
1–0 | LDOA3_DIS[1:0] | R/W | 01 | LDOA3 discharge resistance
00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω |