JAJSOP6A may   2022  – march 2023 TPS65219

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  System Control Thresholds
    6. 6.6  BUCK1 Converter
    7. 6.7  BUCK2, BUCK3 Converter
    8. 6.8  General Purpose LDOs (LDO1, LDO2)
    9. 6.9  General Purpose LDOs (LDO3, LDO4)
    10. 6.10 GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
    11. 6.11 Voltage and Temperature Monitors
    12. 6.12 I2C Interface
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequencing
      2. 7.3.2  Power-Down Sequencing
      3. 7.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 7.3.4  Reset to SoC (nRSTOUT)
      5. 7.3.5  Buck Converters (Buck1, Buck2, and Buck3)
      6. 7.3.6  Linear Regulators (LDO1 through LDO4)
      7. 7.3.7  Interrupt Pin (nINT)
      8. 7.3.8  PWM/PFM and Low Power Modes (MODE/STBY)
      9. 7.3.9  PWM/PFM and Reset (MODE/RESET)
      10. 7.3.10 Voltage Select pin (VSEL_SD/VSEL_DDR)
      11. 7.3.11 General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
      12. 7.3.12 I2C-Compatible Interface
        1. 7.3.12.1 Data Validity
        2. 7.3.12.2 Start and Stop Conditions
        3. 7.3.12.3 Transferring Data
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 OFF State
        2. 7.4.1.2 INITIALIZE State
        3. 7.4.1.3 ACTIVE State
        4. 7.4.1.4 STBY State
        5. 7.4.1.5 Fault Handling
    5. 7.5 User Registers
    6. 7.6 Device Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Typical Application Example
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Buck1, Buck2, Buck3 Design Procedure
        2. 8.2.3.2 LDO1, LDO2 Design Procedure
        3. 8.2.3.3 LDO3, LDO4 Design Procedure
        4. 8.2.3.4 VSYS, VDD1P8
        5. 8.2.3.5 Digital Signals Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  10. 10Mechanical, Packaging, and Orderable Information

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RSM|32
  • RHB|32
サーマルパッド・メカニカル・データ

7.3.8 PWM/PFM and Low Power Modes (MODE/STBY)

The TPS65219 supports low power modes through the I2C-control or through the MODE/STBY pin. The configuration of the pin is selected by MODE_STBY_CONFIG in MFP_2_CONFIG register. The polarity of this pin can be configured by writing to MODE_STBY_POLARITY in MFP_1_CONFIG register. The polarity-configuration must not change after power-up. Only either MODE/RESET or MODE/STBY must be configured as MODE. If both are configured as MODE, MODE/RESET takes priority and MODE/STBY is ignored.

MODE/STBY configured as 'MODE':

  • If configured as 'MODE', the pin-status determines the switching-mode of the buck-converters.
  • Forcing this pin for longer than tDEGLITCH_MFP forces the buck-regulators into PWM-mode (irrespective of load current). De-asserting this pin low allows the buck regulators to enter PFM-mode. The entry into PFM and exit from PFM is governed by the load current. Only one pin, either MODE/STBY or MODE/RESET must be configured as 'MODE'.
  • The selection of auto-PFM/forced-PWM can also be controlled by writing to the bit MODE_I2C_CTRL in MFP_1_CONFIG register.
  • A change of the MODE does not cause a state-transition.
  • During power-up of any one of the three bucks, a MODE change is blanked on this rail and only takes effect after the ramp completed.

MODE/STBY configured as 'STBY':

  • Forcing this pin for longer than tDEGLITCH_MFP sequences down the rails selected to turn off in the STBY_1_CONFIG respectively the STBY_2_CONFIG register. De-asserting this pin sequences the selected rails on again.
  • A transition into and out of STBY state can also be controlled by writing to the bit STBY_I2C_CTRL in MFP_CTRL register, provided I2C communication is supported during STBY state.
  • A change of the MODE/STBY pin configured as 'STBY' does cause a state-transition by definition.
  • Regardless of the pin-setting, the device always powers up into ACTIVE state. The device reacts to the STBY-pin-state or I2C-commands only after entering ACTIVE state.

MODE/STBY configured as 'MODE & STBY':

  • The pin can be configured to perform both functions, MODE and STBY simultaneously
  • Forcing this pin for longer than tDEGLITCH_MFP sequences down the rails selected to turn off in the STBY_1_CONFIG respectively the STBY_2_CONFIG register and allows auto-PFM entry (only applicable in quasi-fixed-frequency mode). De-asserting this pin sequences the selected rails on again and forces the buck-regulators to forced-PWM. Polarity settings need to be harmonized for this configuration.
  • If a transition into and out of STBY state is commanded by writing to the bit STBY_I2C_CTRL in MFP_CTRL register (provided I2C communication is supported during STBY state), a separate command for the MODE-change is required by writing to the bit MODE_I2C_CTRL in MFP_1_CONFIG register.
  • A change of the MODE/STBY pin configured as 'MODE&STBY' does cause a state-transition by definition.
  • By default STBY is deasserted and the pin is ignored until the device completed the power-up-sequence. During power-up of any one of the three bucks, a MODE-change is blanked on this rail and only takes effect after the ramp completed. A state-change commanded by STBY-pin is reacted to even during the ramp of rails (except during INITIALIZE-to-ACTIVE transition).

Please see the truth-table for pin- and I2C-commands in Section PWM/PFM and Reset (MODE/RESET)