JAJSOP6A may 2022 – march 2023 TPS65219
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The function of this pin is configured by VSEL_DDR_SD in MFP_1_CONFIG.
When configured as VSEL_SD, the bit VSEL_RAIL in MFP_1_CONFIG register selects LDO1 or LDO2 to be controlled by the pin. The configuration must not change after power-up.
VSEL_SD/VSEL_DDR configured as 'VSEL_SD': SD-card-IO-select:
The polarity of this pin can be configured by writing to VSEL_SD_POLARITY in MFP_1_CONFIG register. Toggling the pin changes the output voltage of the selected LDO between hard-coded 1.8 V and the voltage configured in LDOx_VOUT. For the SD-card-IO-supply, LDOx_VOUT must be configured for 3.3 V. A change of the VSEL_SD status does not cause a state-transition.
VSEL_SD/VSEL_DDR configured as 'VSEL_DDR':
Pulling this pin high sets the output voltage of Buck3 to 1.35 V (DDR3LV), leaving the pin floating sets the output voltage of Buck3 to 1.2 V (DDR4, LP-DDR3, some LP-DDR2), pulling the pin low sets the output voltage of the Buck3 voltage configured in BUCK3_VOUT. For LP-DDR4, BUCK3_VOUT must be configured to 1.1 V.
The Table below shows the various combinations.
VSEL_DDR_SD | VSEL_SD_POLARITY | VSEL_RAIL | PIN status VSEL_SD/VSEL_DDR | Output (V) | Rail |
---|---|---|---|---|---|
0:DDR | n/a | 0 =LDO1; 1=LDO2 (needed for I2C control) | 0 | BUCK3_VOUT | BUCK3 |
0:DDR | n/a | 0 =LDO1; 1=LDO2 (needed for I2C control) | open | 1.2 V | BUCK3 |
0:DDR | n/a | 0 =LDO1; 1=LDO2 (needed for I2C control) | 1 | 1.35 V | BUCK3 |
1:SD | 0 | 0 =LDO1 | 0 | 1.8 V | LDO1 |
1:SD | 0 | 0 =LDO1 | 1 | LDO1_VOUT | LDO1 |
1:SD | 1 | 0 =LDO1 | 0 | LDO1_VOUT | LDO1 |
1:SD | 1 | 0 =LDO1 | 1 | 1.8 V | LDO1 |
1:SD | 0 | 1 =LDO2 | 0 | 1.8 V | LDO2 |
1:SD | 0 | 1 =LDO2 | 1 | LDO2_VOUT | LDO2 |
1:SD | 1 | 1 =LDO2 | 0 | LDO2_VOUT | LDO2 |
1:SD | 1 | 1 =LDO2 | 1 | 1.8 V | LDO2 |