SBAA222A October   2017  – April 2025 ADS1282-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Overview
  5. 2 SEE Mechanisms
  6. 3 Test Device and Evaluation Board
  7. 4 Irradiation Facility and Setup
    1. 4.1 Depth, Range, and LETeff Calculation
  8. 5 Test Setup and Procedures
    1. 5.1 SEE Testing Block Diagram
    2. 5.2 Test Parameters
    3. 5.3 Test Conditions
  9. 6 SET Test Results
  10. 7 SEL Test Results
  11. 8 Conclusions
  12. 9 Acknowledgment
  13. 10References
  14. 11Revision History

1 Overview

High-resolution analog-to-digital converters (ADCs) play a critical role in signal conditioning for sensors with wide dynamic range. Examples of such applications include monitoring thermocouples, accelerometers, and precision instrumentation. However, the lack of space-grade high-dynamic range analog-to-digital converters has often been cited as an impediment to developing important space applications [1].

The ADS1282-SP is a high-resolution delta-sigma ADC for space applications. It offers up to 122dB SNR with a total harmonic distortion of –102dB, and integral nonlinearity (INL) of 0.5ppm [2]. The block diagram shown in Figure 1-1 includes a front-end programmable gain amplifier (PGA) with a gain range up to 64×, to fully exploit the wide dynamic range available in the ADC. The fast-responding overrange detection circuit provides indication if the differential input voltage exceeds the ADC full scale. Programmable digital filters include user-selectable Sinc filter, FIR, and an IIR filter. The output is available through an SPI interface.

ADS1282-SP Block Diagram Figure 1-1 ADS1282-SP Block Diagram

There are two power supplies on the ADS1282-SP: AVDD and DVDD. The supplies can be powered up in any sequence. The device requires a clock input to be supplied on the CLK pin. A 4MHz clock is used for the testing described in this document.