SBAU251B July   2017  – February 2023 ADS8331 , ADS8332

 

  1.   ADS8332EVMV2-PDK User's Guide
  2.   Trademarks
  3. 1Overview
    1. 1.1 ADS8332EVMV2-PDK Features
    2. 1.2 ADS8332EVMV2 Features
  4. 2EVM Analog Interface
    1. 2.1 ADS8332EVMV2 Onboard Reference
  5. 3Digital Interfaces
    1. 3.1 ADS8332 Digital Interface
  6. 4Power Supplies
  7. 5ADS8332EVMV2-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  8. 6ADS8332EVMV2-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Time Domain Display Tool
    3. 6.3 Spectral Analysis Tool
    4. 6.4 Histogram Tool
    5. 6.5 Linearity Analysis Tool
    6. 6.6 Input Amplifier Configurations
  9. 7Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  10. 8Revision History

3.1 ADS8332 Digital Interface

The ADS8332EVMV2-PDK communicates with the PHI controller through SPI connections. The PHI controller is configured to operate at a 3.3-V logic level and is directly connected to the digital I/O lines of the ADC.

Socket strip connector J2 provides the digital I/O connections between the ADS8332EVMV2 board and the PHI controller.

Table 3-1 summarizes the pin-outs for connector J2.

Table 3-1 Digital I/O Connections for Connector J2
Pin NumberSignalDescription
J2.1EVM_REG_5V55.5-V power supply from the PHI to the ADS8332EVMV2
J2.3GNDGround connection
J2.18SDISerial data input connection
J2.20CONVSTActive high logic input to control start of conversion
J2.22CSChip select, active low
J2.24SCLKClock input for serial interface
J2.50DVDD3.3-V digital supply from the PHI controller board
J2.56EVM_ID_SDASerial data for the EEPROM (U10)
J2.58EVM_ID_SCLSerial clock for the EEPROM (U10)
J2.59EVM_ID_PWRPower supply used only to power the EEPROM (U10) on the EVM board
J2.60GNDGround connection