SBAU336A March   2020  – March 2021 AMC3306M05 , AMC3306M25 , AMC3336 , AMC3336-Q1

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 Features
    2. 1.2 Introduction
  3. 2Analog Interface
    1. 2.1 Analog Inputs
    2. 2.2 Digital Input and Output
  4. 3Power Supplies
    1. 3.1 VDD Input
  5. 4EVM Operation
    1. 4.1 Analog Inputs: J2
    2. 4.2 User Power and Digital Input and Output: J1 and J3
    3. 4.3 Device Operation
  6. 5Layout, BOM, and Schematic
    1. 5.1 Layout
    2. 5.2 Bill of Material
    3. 5.3 Schematic
  7.   Revision History

4.3 Device Operation

After the VDD power and the external clock input at CLKIN are applied to the AMC33xxEVM, the DOUT pin will begin to generate a bitstream output.

An analog input signal may be applied directly at screw terminal J2. See Figure 2-1 and Table 4-1 for details. For the AMC3306EVM, the differential analog input range, (VIN+) – (VIN–), is specified at ±250 mV with a maximum of ±320 mV before clipping occurs. For the AMC3336EVM, the differential analog input range, (VIN+) – (VIN–), is specified at ±1 V with a maximum of ±1.25 V before clipping occurs.

The digital output is a bitstream that alternates between 0 V and VDD. Using the AMC3306 for example, a differential input signal of 0 V ideally produces a stream of ones and zeros that are high 50% of the time, while a differential input of 250 mV produces a bitstream that is high 89.06% of the time. If the input is less than –320 mV or greater than 320 mV, the output modulator clips with a stream of only zeros or ones. In this case, however, the AMC3306 generates a single one or zero every 128 clock cycles to indicate proper device function.