SBAU416C November   2022  – March 2025 ADS9813 , ADS9817

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 ADS9813EVM and ADS9817EVM Quick Start Guide
    3. 2.3 Analog Interface
      1. 2.3.1 ADC Input SMA Connections
      2. 2.3.2 Voltage Reference
    4. 2.4 Digital Interface and Clock Inputs
      1. 2.4.1 Digital Interface Connections
      2. 2.4.2 Clock Select
    5. 2.5 Power Supplies
      1. 2.5.1 USB Power and When to Power the Board Externally
  7. 3Software
    1. 3.1 ADS9817EVM and ADS9813EVM Software Installation
      1. 3.1.1 USB Driver Installation
    2. 3.2 ADS9817EVM Software (ADS9817EVM-GUI)
      1. 3.2.1 Using the CONFIG Tab
      2. 3.2.2 Using the Capture Tab
      3. 3.2.3 Using the INL/DNL Tool
      4. 3.2.4 Using the Histogram Tab
    3. 3.3 ADS9813EVM Software (ADS98XXEVM-GUI)
      1. 3.3.1 Using Configuration Tab
      2. 3.3.2 Using the Data Capture Tab
      3. 3.3.3 Using the Linearity Analysis Tab
      4. 3.3.4 Using the Histogram Analysis Tab
  8. 4Hardware Design Files
    1. 4.1 Schematics
      1. 4.1.1 ADS9813EVM Schematics
      2. 4.1.2 ADS9817EVM Schematics
    2. 4.2 Layout
    3. 4.3 Bill of Materials (BOM)
      1. 4.3.1 ADS9813EVM Bill of Materials (BOM)
      2. 4.3.2 ADS9817EVM Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Related Documentation
  11. 7Revision History

2.5 Power Supplies

By default, the TSWDC155EVM provides the ADS9813EVM and ADS9817EVM with a 3.3V supply (3P3V). The ADS9813EVM and ADS9817EVM both have a TPS61070 boost converter that boosts the 3.3V supply to 5.4V. By default, this voltage is applied to low-dropout regulators (LDOs) to derive the AVDD, DVDD, and IOVDD supplies when JP4 is in the [1-2] position. U2 (TPS7A2050) provides the 5V AVDD supply and U3 and U6 (TPS7A2018) provide the 1.8V DVDD and IOVDD supplies, respectively. The LDO input voltage (LDO_IN) can be changed to an external source (5.2V to 5.5V) applied to terminal block J1 by placing a shunt on JP4 in the [2-3] position. In this case, U1 (LM66100) provides reverse polarity protection if the connection is wired incorrectly. Figure 2-7 shows the power tree schematic for the ADS9813EVM and ADS9817EVM.

ADS9813EVM, ADS9817EVM Power Entry and RegulatorsFigure 2-7 Power Entry and Regulators