SLAAEQ8 February 2025 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0C1105 , MSPM0C1106 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3216 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2227 , MSPM0L2228 , MSPM0L2228-Q1
In the Figure 3-1, there is a interrupt control between Timer A0 CC2 and GPIO. Interrupt is a software control method and there is a large delay in using interrupt compared with event hardware control method.
Figure 3-2 shows the delay between Timer A0 CC2 PWM falling edge and GPIO falling edge. The red mask area is the delay time between PWM and GPIO. Code below shows the interrupt handling process, this delay is a fixed value if this timer interrupt is the only highest priority interrupt in the system. Timer A0 CC2's value need to be set to:
where CC2th is the theoretical value of Timer A0 CC2, and delay is the red mask area shown in Figure 3-2. delay need to convert to timer CC value depending on the timer clock configuration.
Figure 3-2 Delay between PWM and
GPIOvoid PWM_1_P_INST_IRQHandler(void)
{
switch(DL_Timer_getPendingInterrupt(PWM_1_P_INST)){
case DL_TIMER_IIDX_CC2_UP:
DL_GPIO_clearPins(PWM_1_N_PORT, PWM_1_N_PIN_0_PIN);
break;
default:
break;
}
}