SLUAA61B September   2022  – November 2022 UCC27282-Q1 , UCC27284-Q1

 

  1. 1Functional Safety FIT Rate, FMD and Pin FMA
    1. 1.1 Overview
    2. 1.2 Functional Safety Failure In Time (FIT) Rates
      1. 1.2.1 SOIC Package
        1. 1.2.1.1 Failure Mode Distribution (FMD)
      2. 1.2.2 VSON Package
        1. 1.2.2.1 Failure Mode Distribution (FMD)
    3. 1.3 Pin Failure Mode Analysis (Pin FMA)
      1. 1.3.1 SOIC Package
      2. 1.3.2 VSON Package
  2. 2Revision History

1.2.2.1 Failure Mode Distribution (FMD)

The failure mode distribution estimation for UCC27282-Q1 in Die Failure Modes and Distribution comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 1-6 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
HO stuck high 16.5%
HO stuck low 16.5%
HO voltage out of specified range 16.5%
LO stuck high 16.5%
LO stuck low 16.5%
LO voltage out of specified range 16.5%
UVLO not functional or Interlock not functional 1%