SNAU291 October   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 EVM Quick Start
      1. 2.1.1 Hardware Setup
      2. 2.1.2 EVM Measurements
    2. 2.2 Device Operation Modes
    3. 2.3 EVM Configuration
      1. 2.3.1 Power Supply
      2. 2.3.2 Logic Input and Outputs
      3. 2.3.3 Clock Input
      4. 2.3.4 Clock Outputs
      5. 2.3.5 Status Outputs, LEDs and Test Points
  8. 3Software
    1. 3.1 Software Installation
      1. 3.1.1 Software Setup
      2. 3.1.2 Program and Setup
    2. 3.2 TICS Pro LMKDB1108 Software
      1. 3.2.1 Input
        1. 3.2.1.1 Input Interface Type
        2. 3.2.1.2 Input Termination
        3. 3.2.1.3 Auto Output Disable (AOD)
        4. 3.2.1.4 LOS Event
        5. 3.2.1.5 LOS Readback
      2. 3.2.2 Device Info
        1. 3.2.2.1 EVM Setup
        2. 3.2.2.2 SMBus
      3. 3.2.3 Output
        1. 3.2.3.1 SMBus
        2. 3.2.3.2 OE Pin Control
        3. 3.2.3.3 Side Band Interface (SBI)
  9. 4Implementation Results
    1. 4.1 Typical Phase Noise Characteristic
  10. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  11. 6Compliance Information
    1. 6.1 Compliance and Certifications
  12. 7References

2.3.2 Logic Input and Outputs

The logic input and output pins on LMKDB1108 provides option for selecting different device modes, output enable / disable control, loss of signal (LOS) detection, and different device address selection. The following section describes the function of different input and output logic pins. Voltage levels for input pins can be set through TICSPro GUI or using on-board jumper as specified in Table 3-2.

Table 2-4 Device Start-Up Modes
SBEN_EN Input Level Start-up Mode
Low SBI disabled
High SBI enabled

Table 2-5 Output Enable Pin Control
OE0# to OE7# INPUT LEVEL OUTPUT STATUS
Low Enabled
High Disabled
Table 2-6 Loss of Signal Detection (LOS)
LOSb OUTPUT LEVEL (Status pin) LOS STATUS
Low Detected
High Not detected
Table 2-7 SLEWRATE_SEL
SLEWRATE_SEL OUTPUT SLEW RATE
Low Slow
High Fast
Table 2-8 SMBus Address Decode
Address Selection Binary Value Hex Value
SADR1_tri SADR0_tri 7 6 5 4 3 2 1 Rd/Wrt Without Rd/Wrt With Rd/Wrt
0 0 1 1 0 1 1 0 0 0 6C D8
M 1 1 0 1 1 0 1 0 6D DA
1 1 1 0 1 1 1 1 0 6F DE
M 0 1 1 0 0 0 0 1 0 61 C2
M 1 1 0 0 0 1 0 0 62 C4
1 1 1 0 0 0 1 1 0 63 C6
1 0 1 1 0 0 1 0 1 0 65 CA
M 1 1 0 0 1 1 0 0 66 CC
1 1 1 0 0 1 1 1 0 67 CE
Note: SMBus address for the device is Bits[7:1]. Often Rd/Wrt bit is included in the hex value depending on the different vendors. With Rd/Wrt column shows hex value when Rd/Wrt value is considered 0, while Without Rd/Wrt is the SMBus address.