SPRACO5 September   2019 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DK-Q1

 

  1.   Leveraging High Resolution Capture (HRCAP) for Single Wire Data Transfer
    1.     Trademarks
    2. 1 Introduction
    3. 2 System Showcase
      1. 2.1 HRPWM: Encoding Unit
      2. 2.2 HRCAP: Decoding Unit
    4. 3 Software Flow
      1. 3.1 User Configurable Parameters
      2. 3.2 SFO Background Loop
      3. 3.3 Interrupt Based Encoding and Decoding
      4. 3.4 Offset Calibration
    5. 4 Experimental Setup and Results
    6. 5 Summary
    7. 6 References

2 System Showcase

The showcasing data communication system utilizes the high resolution PWM (HRPWM) module of C2000 as an encoding unit and high resolution capture (HRCAP) of C2000 as decoding unit. Figure 1 illustrates the transmitter and the receiver blocks. Based on the analog input sampled by transmitter, CPU configures the high resolution PWM signal that is then captured using high resolution capture at receiver and the decoded data is communicated to CPU.

Figure 1. Transmitter and Receiver Blocks