SPRACR6 April   2020 TMS320F280023-Q1 , TMS320F280023C , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DK-Q1

 

  1.   Distributed Power Control Architecture With Multiple MCUs Over FSI
    1.     Trademarks
    2. 1 Introduction
    3. 2 Distributed Power Control Architecture
      1. 2.1 Distributed Power Control Architecture – DC/AC System
      2. 2.2 Distributed Power Control Architecture – AC/DC System
      3. 2.3 Distributed Power Control Architecture – DC/DC System
    4. 3 DC/AC System - Power Topologies
      1. 3.1 MPPT DC/DC Stage
      2. 3.2 DC/AC Inverter Stage
    5. 4 C2000 Controller Configuration for DPCA DC/AC System
    6. 5 Communication Interface – FSI for DPCA DC/AC System
      1. 5.1 FSI Star Connection
      2. 5.2 FSI Daisy Chain Connection
      3. 5.3 FSI Frame
      4. 5.4 FSI Transmission Latencies
    7. 6 Summary
    8. 7 References

Communication Interface – FSI for DPCA DC/AC System

The Fast Serial Interface (FSI) module is a serial communication peripheral capable of reliable high-speed communication across isolation devices using only a few signals. The FSI consists of independent transmitter (FSITX) and receiver (FSIRX) cores. The FSITX and FSIRX modules are configured and operated independently. The FSI is designed to ensure data robustness across many system conditions such as chip-to-chip as well as board-to-board across an isolation barrier. Payload integrity checks such as CRC, start- and end-of-frame patterns, and user-defined tags, are automatically encoded before transmission and then verified after receipt without additional CPU interaction. Line breaks can be detected using periodic low latency transmissions, all managed and monitored by hardware. The FSI is also tightly integrated with other control peripherals on the device. With embedded data robustness checks, data-link integrity checks, skew compensation, and integration with control peripherals, the FSI can enable high-speed, robust communication in any distributed system.

There are multiple ways in which various devices (MCUs) in a distributed power control architecture can be interfaced using FSI. The next section presents two FSI configurations that are applicable to this distributed power control architecture.