SCEA118 June   2022 TXS0108E

 

  1.   1
  2. 1Translate Voltages for SPI
  3.   Design Considerations
  4.   Recommended Parts
  5. 2Translate Voltages for UART
  6.   Design Considerations
  7.   Recommended Parts
  8. 3Translate Voltages for I2C
  9.   Design Considerations
  10.   Recommended Parts
  11. 4Translate Voltages for GPIO
  12.   Design Considerations
  13.   Recommended Parts
  14. 5Translate Voltages for SDIO
  15.   Design Considerations
  16.   Recommended Parts
  17. 6Translate Voltages for RGMII
  18.   Design Considerations
  19.   Recommended Parts
  20. 7Translate Voltages for MDIO
  21.   Design Considerations
  22.   Recommended Parts
  23. 8Translate Voltages for a SIM Card
  24.   Design Considerations
  25.   25

Electronic system designs are becoming more complex as systems designers strive for developing systems that are smarter, smaller, power efficient and more interconnected. Electronic system design trends are driving system designers to incorporate a wide array of microprocessors, FPGAs, and peripheral devices in order to achieve feature sets and system functionality needed by the market. As systems designers try to interconnect the different integrated circuits together, they are often confronted by the design challenge of having to connect two devices operating at two different I/O (input/output) voltage levels. Voltage level mismatches are becoming more prevalent as processor, FPGA, and microcontrollers move to lower core voltage nodes which results in their I/O voltage also scaling down to below common voltage nodes of peripheral devices. The data and control interfaces of devices on different voltage rails cannot be simply connected together and then expected to interoperate. System designers can resolve I/O voltage level differences by level shifting (level translation) the I/O of two devices to common voltage levels so that the devices can interoperate as expected.

Integrated level translation devices provide system designers an easy and cost-effective solution for resolving their system’s I/O level mismatch challenges without having to compromise on performance, power, or size. Integrated level shifting solutions are available in a wide array of I/O types, bit widths, data rate ranges, current drive capabilities, and package options. Texas Instruments’ portfolio of level shifter devices contains many different types of level translation functions that collectively is able to address almost any application requirement. TI’s level translation portfolio includes Auto Directional, Direction Controlled, Fixed Direction, and Application Specific Level Translators in Industrial and Automotive ratings. For a list of recommended level translation devices for common interface types please see Table 1-1. For More information on all of TI’s level translation solutions please visit TI’s level translation landing page at www.ti.com/translation.

Table 1-1 Recommended Translator by Interface
Translation Level
Interface Up to 3.6 V Up to 5.5 V
FET Replacement 2N7001T SN74LXC1T45 / TXU0101
1 Bit GPIO/Clock Signal SN74AXC1T45 SN74LXC1T45 / TXU0101
2 Bit GPIO SN74AXC2T245 SN74LXC2T45 / TXU0102
2-Pin JTAG/UART SN74AXC2T45 SN74LXC2T45 / TXU0202
I2C/MDIO/SMBus TXS0102 / LSF0102 TXS0102 / LSF0102
IC-USB SN74AVC2T872 / TXS0202 NA
4 Bit GPIO SN74AXC4T245 TXB0104 / TXU0104
UART SN74AXC4T245 TXB0104 / TXU0204
SPI SN74AXC4T774 / TXB0104 TXB0104 / TXU0304
JTAG SN74AXC4T774 / TXB0104 TXB0104 / TXU0304
I2S/PCM SN74AXC4T774 / TXB0104 TXB0104 / TXU0204
Quad-SPI TXB0106 TXB0106
SDIO/SD/MMC TXS0206 / TWL1200 NA
8 Bit GPIO/RGMII SN74AXC8T245 SN74LXC8T245