DLPS284 December 2025 DLP3940S-Q1
ADVANCE INFORMATION
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPD | Output propagation, clock to Q, rising edge of LS_CLK input to LS_RDATA output. (1) | CL = 15pF | 15 | ns | ||
| Slew rate, LS_RDATA | 0.3 | V/ns | ||||
| Output duty cycle distortion, LS_RDATA | 40 | 60 | % | |||