DLPS284 December   2025 DLP3940S-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Storage Conditions
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5.     11
    6. 5.5  Thermal Information
    7. 5.6  Electrical Characteristics
    8. 5.7  Switching Characteristics
    9. 5.8  Timing Requirements
    10.     16
    11. 5.9  System Mounting Interface Loads
    12.     18
    13. 5.10 Micromirror Array Physical Characteristics
    14.     20
    15. 5.11 Micromirror Array Optical Characteristics
    16. 5.12 Window Characteristics
    17. 5.13 Chipset Component Usage Specification
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 SubLVDS Data Interface
      2. 6.3.2 Low Speed Interface for Control
      3. 6.3.3 Power Interface
      4. 6.3.4 Timing
    4. 6.4 Device Functional Modes
    5. 6.5 Optical Interface and System Image Quality Considerations
      1. 6.5.1 Numerical Aperture and Stray Light Control
      2. 6.5.2 Pupil Match
      3. 6.5.3 Illumination Overfill
    6. 6.6 Micromirror Array Temperature Calculation
      1. 6.6.1 Monitoring Array Temperature Using the Temperature Sense Diode
    7. 6.7 Micromirror Power Density Calculation
    8. 6.8 Window Aperture Illumination Overfill Calculation
    9. 6.9 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 6.9.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Application Overview
      2. 7.2.2 Input Image Resolution
      3. 7.2.3 Reference Design
      4. 7.2.4 Application Mission Profile Consideration
      5. 7.2.5 Design Requirements
      6. 7.2.6 Detailed Design Procedure
    3. 7.3 Temperature Sensing
      1. 7.3.1 Temperature Sensing Diode
        1. 7.3.1.1 Temperature Sense Diode Theory
  9. 8 Power Supply Recommendations
    1. 8.1 DMD Power Supply Power-Up Procedure
    2. 8.2 DMD Power Supply Power-Down Procedure
    3. 8.3 DMD Power Supply Sequencing Requirements
  10. 9 Layout
    1. 9.1 Layout Guidelines
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Device Support
      1. 10.2.1 Device Nomenclature
      2. 10.2.2 Device Markings
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3 DMD Power Supply Sequencing Requirements

DLP3940S-Q1 DMD Power Supply Requirements
A. See Pin Configuration and Functions for the Pin Functions Table.
B. To prevent excess current, the supply voltage difference |VOFFSET – VBIAS| must be less than the specified limit in the Recommended Operating Conditions.
C. To prevent excess current, the supply difference |VBIAS – VRESET| must be less than the specified limit in Recommended Operating Conditions.
D. VBIAS should power up after VOFFSET has powered up, per the tDELAY1 specification.
E. DLP controller software initiates the global VBIAS command.
F. After the DMD micromirror park sequence is complete, the DLP controller software initiates a hardware power-down that activates DMD_EN_ARSTZ and disables VBIAS, VRESET, and VOFFSET.
G. Under power-loss conditions where emergency DMD micromirror park procedures are being enacted by the DLP controller hardware, DMD_EN_ARSTZ will go low.
H. VDD must remain high until after VOFFSET, VBIAS, VRESET go low, per tDELAY3 specification.
I. To prevent excess current, the supply voltage delta |VDDI – VDD| must be less than the specified limit in Recommended Operating Conditions.
Figure 8-1 DMD Power Supply Requirements