SBAA106A June   2020  – August 2021 ADS112C04 , ADS112U04 , ADS114S06 , ADS114S08 , ADS122C04 , ADS122U04 , ADS1235 , ADS1235-Q1 , ADS124S06 , ADS124S08 , ADS1259 , ADS1259-Q1 , ADS125H01 , ADS125H02 , ADS1260 , ADS1260-Q1 , ADS1261 , ADS1262 , ADS1263 , ADS127L01 , ADS131A02 , ADS131A04 , ADS131M04 , ADS131M06 , ADS131M08


  1.   Trademarks
  2. 1Introduction
  3. 2Simple Checksum
    1. 2.1 Checksum Code Example
  4. 3CRC
    1. 3.1 CRC Generic Computations
      1. 3.1.1 Using XOR Bitwise Computation
      2. 3.1.2 Using Lookup Tables
        1. Table Initialization
        2. CRC Computation
      3. 3.1.3 CRC Computation Differences Between the ADS122U04 and ADS122C04
        1. Byte Reflection Example
        2. Reassembling Data Using Byte Reflection for CRC Computation
  5. 4Hamming Code
    1. 4.1 Hamming Code Computation
      1. 4.1.1 Hamming Code Computation Example
        1. Counting Bits for Parity and Checksum Computations
          1. Example of Counting Set Bits in the Data
          2. Example of Counting Set Bits Using a Lookup Table
      2. 4.1.2 Validation of Transmitted Data
        1. Hamming Validation
        2. Checksum Validation
        3. Error Correction
  6. 5Summary
  7. 6References
  8. 7Revision History


CRC is a polynomial based system and can vary in the number of bits used and the effectiveness of detecting an error for a given polynomial. Checksum differs from CRC in that checksum uses addition, whereas CRC uses division. The desired polynomial is divided into the data leaving a remainder to be transmitted following the data. The effectiveness of using any particular polynomial is indicated by the Hamming Distance (HD) which for the discussion of CRC is the boundary where an undetected bit error may occur. HD signifies the minimum number of bit errors that are undetectable. The number of bits when all errors are detected is one less than the HD. The HD can change relative to the length of the data and generally will decrease as the length of the number of data bits increases.

As a part of the CRC discussion, Hamming Weight (HW) refers to the number of undetectable bit errors for a polynomial for a given number of bit errors. The ideal HW is zero and when the HW is non-zero for a given number of bits then not all combinations of bit errors will be detected should an error occur. The HD relates to the first HW greater than 0. For example, if a polynomial has a HD of 4 , all combinations of 1, 2, and 3-bit error, also known as bit reversals or flips, are detected. If the HW is 11 for 4-bit errors with data lengths of 48 bits or more, then there are 11 combinations of undetectable 4-bit errors for the data packet.

Depending on the polynomial and the total number of bits in the data transfer, the HD might increase for up to a particular number of bits of data. Using the previous example, the HD may be increased from 4 to 5 for a data length less than 48 bits. Much data has been collected regarding the HD of various polynomials by independent research. The point of this discussion is to limit some confusion as to the effectiveness of various polynomials and show that undetected error may still occur when using CRC. Different polynomials are used by various ADCs and in most cases are fixed to a single polynomial. Thus, there may be little to no choice on which polynomial to use. The polynomials used for the ADC may not be the best polynomial to use in a given application, but is chosen due to familiarity or commonality of a particular polynomial. Another reason may be for the availability of hardware implementations on various microcontrollers. As many microcontrollers use 8-bit (byte) communication it becomes useful to use CRC polynomials that are oriented to 8-bits or multiples of 8-bits. This discussion will not focus on which polynomial to use, but rather focus on the actual polynomials used for devices such as the ADS124S08 family of devices (8-bit CRC) as well as the ADS122x04 family of devices (16-bit CRC).

As both the encoding and decoding of the CRC is similar the bit patterns of the remainder can be easily compared. If the bits match, then it is likely the transmission was valid for a given HD. However, if the bits do not match then an error occurred. From a software implementation, the polynomial is divided into the data word resulting in a remainder. From the ADC hardware perspective, these devices utilize some form of logic in relation to the output shift register to compute the CRC value regardless of the data length being transmitted. It is important that the data be analyzed in the same bit order as the initial CRC computation. So careful attention to Endianess (see Table 3-1) and byte order is needed.