Product details

Resolution (Bits) 24 Number of input channels 2 Sample rate (Max) (kSPS) 40 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-Ended Multi-channel configuration Multiplexed Rating Catalog Reference mode Ext, Int Input range (Max) (V) 15.5 Input range (Min) (V) 0 Features 50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 45 Analog voltage AVDD (Min) (V) -18, 0 Analog voltage AVDD (Max) (V) 18, 36 Digital supply (Min) (V) 2.7 Digital supply (Max) (V) 5.25
Resolution (Bits) 24 Number of input channels 2 Sample rate (Max) (kSPS) 40 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-Ended Multi-channel configuration Multiplexed Rating Catalog Reference mode Ext, Int Input range (Max) (V) 15.5 Input range (Min) (V) 0 Features 50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 45 Analog voltage AVDD (Min) (V) -18, 0 Analog voltage AVDD (Max) (V) 18, 36 Digital supply (Min) (V) 2.7 Digital supply (Max) (V) 5.25
VQFN (RHB) 32 25 mm² 5 x 5
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, high-impedance PGA:
    • Differential input range: up to ±20 V
    • Programmable gain: 0.125 to 128
    • Common-mode input voltage: up to ±15.5 V
    • Input impedance: 1 GΩ (minimum)
  • High-performance ADC:
    • Input noise: 45 nVRMS (20 SPS)
    • CMRR: 105 dB
    • Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
    • Offset drift: 5 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • 2.5-V reference: 3 ppm/°C drift
    • Clock oscillator: 2.5% error (maximum)
    • Excitation current sources
    • GPIO to drive external mux
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, high-impedance PGA:
    • Differential input range: up to ±20 V
    • Programmable gain: 0.125 to 128
    • Common-mode input voltage: up to ±15.5 V
    • Input impedance: 1 GΩ (minimum)
  • High-performance ADC:
    • Input noise: 45 nVRMS (20 SPS)
    • CMRR: 105 dB
    • Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
    • Offset drift: 5 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • 2.5-V reference: 3 ppm/°C drift
    • Clock oscillator: 2.5% error (maximum)
    • Excitation current sources
    • GPIO to drive external mux
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

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Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS125H02EVM — ADS125H02 evaluation module

The ADS125H02 evaluation module (EVM) is a platform for evaluating the ADS125H02 analog-to-digital converter (ADC). ADS125H02 is a wide-input-range, 24-bit, 19.2-kSPS, delta-sigma (ΔΣ) ADC with an integrated PGA, voltage reference, and internal fault monitors. Differential input (...)

Support software

ADS125H02 Example C Code (Rev. A)

SBAC233A.ZIP (58 KB)
Support software

ADS125H02 Design Calculator (Rev. A)

SBAC234A.ZIP (2156 KB)
Simulation model

ADS125H0X IBIS Model

SBAM384.ZIP (65 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Package Pins Download
VQFN (RHB) 32 View options

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