Product details

Resolution (Bits) 24 Sample rate (max) (ksps) 40 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 15.5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Oscillator, PGA, Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 45 Analog supply voltage (min) (V) -18, 0 Analog supply voltage (max) (V) 18, 36 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
Resolution (Bits) 24 Sample rate (max) (ksps) 40 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 15.5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Oscillator, PGA, Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 45 Analog supply voltage (min) (V) -18, 0 Analog supply voltage (max) (V) 18, 36 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, 1-GΩ input impedance PGA:
    • Differential input range: up to ±20 V
    • Absolute input range: up to ±15.5 V
    • Programmable attenuation and gain:
      • 0.125 to 128
  • High-performance ADC:
    • Noise: 45 nVRMS (gain = 128, 20 SPS)
    • CMRR: 105 dB
    • 50-Hz and 60-Hz rejection: 95 dB
    • Offset drift: 10 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • Internal oscillator
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, 1-GΩ input impedance PGA:
    • Differential input range: up to ±20 V
    • Absolute input range: up to ±15.5 V
    • Programmable attenuation and gain:
      • 0.125 to 128
  • High-performance ADC:
    • Noise: 45 nVRMS (gain = 128, 20 SPS)
    • CMRR: 105 dB
    • 50-Hz and 60-Hz rejection: 95 dB
    • Offset drift: 10 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • Internal oscillator
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package

The ADS125H01 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), a clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V supply PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable attenuation and gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. A 1-GΩ minimum input impedance reduces error resulting from sensor loading. Additionally, the low-noise and low-drift performance allow direct connections to strain-gauge bridge and thermocouple sensors that are affected by high common-mode voltage.

The digital filter is programmable over a wide range from 2.5 SPS to 40 kSPS. Attenuation of 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS reduces measurement error. In most data rates, the filter provides no-latency conversion data for high data throughput during external channel sequencing.

The ADS125H01 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

The ADS125H01 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), a clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V supply PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable attenuation and gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. A 1-GΩ minimum input impedance reduces error resulting from sensor loading. Additionally, the low-noise and low-drift performance allow direct connections to strain-gauge bridge and thermocouple sensors that are affected by high common-mode voltage.

The digital filter is programmable over a wide range from 2.5 SPS to 40 kSPS. Attenuation of 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS reduces measurement error. In most data rates, the filter provides no-latency conversion data for high data throughput during external channel sequencing.

The ADS125H01 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

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* Data sheet ADS125H01 ±20-V Input, 40-kSPS, 24-Bit, Delta-Sigma ADC datasheet (Rev. A) PDF | HTML Jan 15, 2021
Application note A Simple, Java-Based CRC Calculator PDF | HTML Mar 4, 2026
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Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML Mar 18, 2024
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Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML Mar 29, 2023
Application note Communication Methods for Data Integrity Using Delta-Sigma Data Converters (Rev. A) PDF | HTML Aug 23, 2021
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) Jun 19, 2020

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