SBAA666 February   2025 AMC0106M05 , AMC0106M25

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Design Challenges
  6. 3Design Approach
    1. 3.1 AMC0106Mxx Functionally Isolated Modulators
    2. 3.2 Circuit Design and Layout
    3. 3.3 Sinc3 Filter Design
  7. 4Test and Validation
    1. 4.1 Test Setup
    2. 4.2 Digital Interface
    3. 4.3 DC Accuracy, Noise, and Effective Number of Bits
    4. 4.4 PWM Rejection
      1. 4.4.1 DC Phase Current Measurement Over One PWM Cycle
      2. 4.4.2 AC Phase Current Measurement at 100kHz PWM
    5. 4.5 Bootstrap Supply Validation and AVDD Ripple Rejection Tests
      1. 4.5.1 LMG2100R044 Bootstrap Supply With Low Voltage-Ripple
      2. 4.5.2 Discrete Bootstrap Supply With High Voltage-Ripple
  8. 5Summary
  9. 6References

LMG2100R044 Bootstrap Supply With Low Voltage-Ripple

The following figures show the AVDD bootstrap supply voltage for a 10kHz and a 100kHz PWM at different PWM duty cycles. The bootstrap supply is implemented with the LMG2100R044 integrated bootstrap diode, the external bootstrap capacitors C41 (100nF), C40 (4.7µF) and the current limit resistor R15 (3Ω). The bootstrap supply drives the LMG2100R044 high-side GaN-FET, which has a typical gate charge of 7.3nC and supplies the AMC0106M05, which has a typical supply current of 6.5mA at 5V.

The bootstrap supply was tested at 10kHz and 100kHz PWM, at 50% duty cycle and constant 95% duty cycle as a worst-case condition.

Figure 4-15 and Figure 4-16 are generated from the csv files of the Tektronix MDO4104B-3 scope, using a TMDP0200 differential probe at a 75V sensitivity and 5MHz bandwidth.

The black trace shows the AVDD voltage referred to floating analog GND (AGND). The red trace shows the AGND common mode voltage in respect to system GND. System GND also equals logic GND (DGND) of the AMC0106M05 and the MCU GND.

 Bootstrap Voltage at 10kHz PWM, 50% Duty
                                                CycleFigure 4-15 Bootstrap Voltage at 10kHz PWM, 50% Duty Cycle
 Bootstrap Voltage  at 10kHz PWM, 95% Duty
                                                CycleFigure 4-16 Bootstrap Voltage at 10kHz PWM, 95% Duty Cycle
Table 4-2 Bootstrap Voltage AVDD with R15 (3Ω),C57 (4.7µF) vs PWM Frequency and Duty Cycle
PWM Frequency
(kHz)
Duty Cycle
(%)
AVDDMIN(1)
(V)
AVDDMAX(1)
(V)
ΔAVDD

(V)
Mean (AVDD)(1)
(V)
10 50 4.34 4.52 0.18 4.43
10 90 3.98 4.28 0.3 4.12
10 95 3.68 4 0.32 3.85
100 50 4.46 4.49 0.03 4.47
100 90 4.11 4.16 0.05 4.14
100 95 3.83 3.88 0.05 3.85
 Mean
                                                AVDD Bootstrap VoltageFigure 4-17 Mean AVDD Bootstrap Voltage
 AVDD
                                                Bootstrap Voltage RippleFigure 4-18 AVDD Bootstrap Voltage Ripple

Figure 4-17 shows that for a given current-limiting resistor (R15) the average bootstrap voltage decreases with lower PWM switching frequency. At lower PWM frequency, the boostrap capacitor has to support a longer ON-time of the high-side FET and, therefore, the average voltage decreases. At high duty cycles, meaning long ON-times of the high-side FET and short charging time of the bootstrap capacitor, the effect of R15 is visible. R15 limits the charging current of the boostrap capacitor. Therefore, at long duty cycles, the boostrap capacitor changes to a lower voltage. This effect can be compensated for by lowering the value of R15.

Figure 4-18 shows the peak-to-peak ripple voltage across the bootstrap capacitor as a function of duty cycle. Again, the ripple voltage increases with PWM duty cycle due to the longer ON-time of the high-side FET and the shorter refresh time of the bootstrap capacitor. For the calculation of mean bootstrap voltage the transient over-and undershoot was ignored. Over- and undershoots are caused by the limited common mode rejection of the differential voltage probe and not by the bootstrap supply.

The AMC0106M05 AVDD supply has a wide recommended operating range from 3V to 5.5V. Hence the bootstrap supply shown in above figures always meets the AMC0106M05 requirements. However, when operating from the LMG2100R044 GaN-FET bootstrap supply, the LMG2100R044 UVLO function has a maximum falling edge threshold 3.7V. The typical threshold is 3.0V. This needs to be considered for the desired PWM frequency and the corresponding maximum PWM cycle.

A smaller bootstrap resistor can be used to increase the minimum bootstrap voltage at high duty cycles. However, the bootstrap resistor has an impact on the peak charging currents. The LMG2100R044 internal bootstrap diode signal path has a dynamic resistance of 1.85Ω typical. The internal resistance has to be added to the external bootstrap resistance R15 to get the effective bootstrap resistance.

Table 4-3 Bootstrap Voltage AVDD with R15 (1.5Ω),C57 (4.7µF) vs PWM Frequency and Duty Cycle
PWM Frequency
(kHz)
Duty Cycle
(%)
AVDDMIN(1)
(V)
AVDDMAX(1)
(V)
ΔAVDD

(V)
Mean (AVDD)(1)
(V)
10 50 4.35 4.51 0.17 4.44
10 90 4.05 4.33 0.28 4.19
10 95 3.83 4.13 0.3 3.96
100 50 4.44 4.48 0.04 4.46
100 90 4.2 4.25 0.05 4.23
100 95 3.93 3.98 0.05 3.96
Does not include the transient undershoot and overshoot of 50mV during the falling edge of the phase-W voltage (bootstrap supply common mode voltage)