SBAS603B April 2013 – November 2020 ADS4449
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DIGITAL GAIN CH D | DIGITAL GAIN BYPASS CH D | TEST PATTERN CH D | |||||
| Bits 7-4 | DIGITAL GAIN CH D: Channel D digital gain programmability | ||
| These bits set the digital gain programmability from 0 dB to 6 dB in 0.5-dB steps for channel D. Set the DIGITAL ENABLE bit to 1 beforehand to enable this feature. | |||
| 0000 =
0-dB gain (default) 0001 = 0.5-dB gain 0010 = 1-dB gain 0011 = 1.5-dB gain 0100 = 2-dB gain 0101 = 2.5-dB gain 0110 = 3-dB gain 0111 = 3.5-dB gain 1000 = 4-dB gain 1001 = 4.5-dB gain 1010 = 5-dB gain 1011 = 5.5-dB gain 1100 = 6-dB gain |
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| Bit 3 | DIGITAL GAIN BYPASS CH D: Channel D digital gain bypass | ||
| 0 =
Normal operation (default) 1 = Digital gain feature for channel A is bypassed |
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| Bits 2-0 | TEST PATTERN CH D: Channel D test pattern programmability | ||
| These
bits program the test pattern for channel D. 000 = Normal operation (default) 001 = Outputs all 0s 010 = Outputs all 1s 011 = Outputs toggle pattern |
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| Output data ([D:0]) are an alternating sequence of 01010101010101 and 10101010101010. | |||
| 100 = Outputs digital ramp | |||
| Output data increments by one 14-bit LSB every clock cycle from code 0 to code 16383 | |||
| 101 = Outputs custom pattern | |||
| To program test pattern, use the CUSTOM PATTERN D[13:0] bits of registers 3Fh and 40h. | |||
| 110 =
Unused 111 = Unused |
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