SBOA643 October   2026 OPA591 , OPA596

 

  1.   1
  2.   Design Goals
  3.   Design Description
  4.   Design Notes
  5.   Design Steps
  6.   Design Simulation Results
  7.   Design Measured Results
  8.   Target Applications
  9.   Design Featured Device
  10.   Design Alternative Device
  11.   Design References
  12. 1Additional Resources
  13.   Trademarks

Design Notes

  1. Designing the Howland current pump can be an iterative process. First, determine the desired output current using a known shunt resistor value. Then, choose R1 and scale R2, R3, and R4 accordingly. For full details and design notes for designing an IHCP, see the "Improved" Howland current pump circuit Analog Engineer's circuit.
  2. This circuit is designed to source current. The polarity of the power supplies can be inverted (VEE = -85V and VCC = 0V) to produce an identical circuit that sinks current. For this reason, complementary FET design is included in the schematic design.
  3. Resistor mismatch contributes gain error and degrade CMRR of the circuit.
  4. Error in final results can be expected due to IFEEDBACK current. Placing high-value resistors will limit the effect of this current but will add thermal noise to the circuit. Possible bandwidth limitations and stability issues caused by large resistances and parasitic capacitances in the circuit also become more prevalent.
  5. In an ideal "Improved" Howland current pump, resistor R4 is usually set equal to R2 – R9, which slightly alters the feedback network but results in the expected ILOAD value. Accuracy of these resistors will limit the effectiveness of the technique at reducing errors.
  6. A voltage divider network (R5, R6, R7, R8) provides nominal voltage to bias VGS.
  7. A capacitive load can be added to the output of the circuit. If using a capacitive load >200pF, further compensation may be needed to stabilize the circuit. See Operational Amplifier Stability Theory and Compensation Methods for information on stabilizing op amps.
  8. Including a footprint for compensation capacitors C1 and C2 is recommended to provide flexibility for stability optimization. Instability can result from capacitive loading at the output node, large feedback resistors, or capacitance on the inverting input. During the bench measurements for this circuit design, ringing was seen on the input. The simulation and design was updated to include a feedback resistor in parallel with R2 (C1). Refer to the Operational Amplifier Stability Theory and Compensation Methods technical paper for a detailed discussion of op amp stability and compensation methods.
  9. Choose a high voltage op amp to maximize the output swing of the circuit.
  10. Verify input voltage is within the full power bandwidth and output voltage specifications for the given op amp. For an 85 V supply, slew induced distortion will become significant above 20 kHz (see Figure 6-3 and Figure 6-4 from OPA591 datasheet). This can also be calculated using the equation:
    Equation 1. V p k = S l e w R a t e 2 π f

    Distortion becomes more significant the closer the output voltage is to the power supply rails. However, distortion in the output crossover region, resulting from the switching characteristics of the discrete transistors, differs from slew-rate-induced distortion. This crossover distortion is also dependent on the input and output capacitance of the transistors, and difficult to calculate empirically. Therefore, the best approach to determine if the desired input frequency is feasible is to simulate the circuit.

  11. When designing the voltage divider that biases the MOSFET transistors, be aware of the trade-off in the size of the resistors. Smaller resistor values increase the current consumption through the bias path, but higher resistor values introduce higher thermal noise. In this example design, R5 and R8 were chosen to be 60.4kΩ for best results.
  12. Careful consideration of the characteristics and tradeoffs between bipolar junction transistors (BJTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) is essential when choosing a discrete complementary output stage (see Table 3-1 from the application note Optimizing Dual Feedback Compensation in the OPA593 With a Current Booster for further detail).
  13. Ensure the circuit is operating within the safe operating area (SOA) of the MOSFET. Consider reducing the power supply to limit the power dissipation within the circuit. This is particularly important when using a DC input source rather than an AC source, as the overall power of the circuit is inherently higher in DC configurations. If the operating range of the circuit exceeds the SOA of the MOSFET, thermal runaway can occur and damage the MOSFET.
  14. Components in output path of the transistors, such as the load resistor, RL, must have adequate power ratings. High voltage and high-power PCB layout guidelines should also be followed (see the TIPL training on Power and Temperature). Consider using a fan to help reduce the heat that the circuit can generate.