SBOS729B October   2015  – October 2025 DRV425

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fluxgate Sensor Front-End
        1. 6.3.1.1 Fluxgate Sensor
        2. 6.3.1.2 Bandwidth
        3. 6.3.1.3 Differential Driver for the Internal Compensation Coil
        4. 6.3.1.4 Magnetic Field Range, Overrange Indicator, and Error Flag
      2. 6.3.2 Shunt-Sense Amplifier
      3. 6.3.3 Voltage Reference
      4. 6.3.4 Low-Power Operation
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Linear Position Sensing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Current Sensing in Busbars
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Supply Decoupling
      2. 7.3.2 Power-On Start-Up and Brownout
      3. 7.3.3 Power Dissipation
        1. 7.3.3.1 Thermal Pad
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Receiving Notification of Documentation Updates
    5. 8.5 Support Resources
    6. 8.6 Trademarks
    7. 8.7 Electrostatic Discharge Caution
    8. 8.8 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Typical Characteristics

at VDD = 5V and TA = 25°C (unless otherwise noted)

DRV425 Fluxgate Sensor Front-end Offset Histogram
VDD = 5V
Figure 5-1 Fluxgate Sensor Front-end Offset Histogram
DRV425 Fluxgate Sensor Front-end Offset vs Supply Voltage
Figure 5-3 Fluxgate Sensor Front-end Offset vs Supply Voltage
DRV425 Fluxgate Sensor Front-end Offset Drift Histogram
Figure 5-5 Fluxgate Sensor Front-end Offset Drift Histogram
DRV425 Fluxgate Sensor Front-end Gain vs Supply Voltage
Figure 5-7 Fluxgate Sensor Front-end Gain vs Supply Voltage
DRV425 Fluxgate Sensor Front-end Linearity Histogram
Figure 5-9 Fluxgate Sensor Front-end Linearity Histogram
DRV425 Fluxgate Sensor Front-end Linearity vs Temperature
Figure 5-11 Fluxgate Sensor Front-end Linearity vs Temperature
DRV425 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level Histogram
VDD = 5V
Figure 5-13 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level Histogram
DRV425 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level vs Temperature
Figure 5-15 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level vs Temperature
DRV425 Compensation Coil Resistance vs Temperature
Figure 5-17 Compensation Coil Resistance vs Temperature
DRV425 Shunt-Sense Amplifier Output Offset Histogram
VDD = 3.3V
Figure 5-19 Shunt-Sense Amplifier Output Offset Histogram
DRV425 Shunt-Sense Amplifier Output Offset vs Temperature
Figure 5-21 Shunt-Sense Amplifier Output Offset vs Temperature
DRV425 Shunt-Sense Amplifier CMRR vs Input Signal Frequency
Figure 5-23 Shunt-Sense Amplifier CMRR vs Input Signal Frequency
DRV425 Shunt-Sense Amplifier PSRR vs Ripple Frequency
Figure 5-25 Shunt-Sense Amplifier PSRR vs Ripple Frequency
DRV425 Shunt-Sense Amplifier AINP Input Impedance vs Temperature
Figure 5-27 Shunt-Sense Amplifier AINP Input Impedance vs Temperature
DRV425 Shunt-Sense Amplifier AINN Input Impedance vs Temperature
Figure 5-29 Shunt-Sense Amplifier AINN Input Impedance vs Temperature
DRV425 Shunt-Sense Amplifier Gain Error Histogram
Including IFG, VDD = 3.3V
Figure 5-31 Shunt-Sense Amplifier Gain Error Histogram
DRV425 Shunt-Sense Amplifier Gain vs Input Signal Frequency
Figure 5-33 Shunt-Sense Amplifier Gain vs Input Signal Frequency
DRV425 OR Pin Trip Level vs Output Current
Figure 5-35 OR Pin Trip Level vs Output Current
DRV425 OR Pin Trip Level vs Temperature
Figure 5-37 OR Pin Trip Level vs Temperature
DRV425 Shunt-Sense Amplifier Output Short-Circuit Current vs Supply Voltage
Figure 5-39 Shunt-Sense Amplifier Output Short-Circuit Current vs Supply Voltage
DRV425 Shunt-Sense Amplifier Small-Signal Settling Time
Rising edge
Figure 5-41 Shunt-Sense Amplifier Small-Signal Settling Time
DRV425 Shunt-Sense Amplifier Large-Signal Settling Time
Rising edge
Figure 5-43 Shunt-Sense Amplifier Large-Signal Settling Time
DRV425 Shunt-Sense Amplifier Overload Recovery Response
VDD = 5V
Figure 5-45 Shunt-Sense Amplifier Overload Recovery Response
DRV425 Shunt-Sense Amplifier Output Voltage Noise Density vs Noise Frequency
Figure 5-47 Shunt-Sense Amplifier Output Voltage Noise Density vs Noise Frequency
DRV425 Reference Voltage Histogram
VREFOUT = 1.65V
Figure 5-49 Reference Voltage Histogram
DRV425 Reference Voltage vs Temperature
Figure 5-51 Reference Voltage vs Temperature
DRV425 Reference Voltage Drift Histogram
Figure 5-53 Reference Voltage Drift Histogram
DRV425 Reference Voltage Load Regulation Histogram
Figure 5-55 Reference Voltage Load Regulation Histogram
DRV425 Quiescent Current vs Supply Voltage
Figure 5-57 Quiescent Current vs Supply Voltage
DRV425 Supply Current vs Magnetic Field
Figure 5-59 Supply Current vs Magnetic Field
DRV425 Fluxgate Sensor Front-end Offset Histogram
VDD = 3.3V
Figure 5-2 Fluxgate Sensor Front-end Offset Histogram
DRV425 Fluxgate Sensor Front-end Offset vs Temperature
Figure 5-4 Fluxgate Sensor Front-end Offset vs Temperature
DRV425 Fluxgate Sensor Front-end Gain Histogram
Figure 5-6 Fluxgate Sensor Front-end Gain Histogram
DRV425 Fluxgate Sensor Front-end Gain vs Temperature
Figure 5-8 Fluxgate Sensor Front-end Gain vs Temperature
DRV425 Fluxgate Sensor Front-end Linearity vs Supply Voltage
Figure 5-10 Fluxgate Sensor Front-end Linearity vs Supply Voltage
DRV425 Fluxgate Sensor Front-end Noise Density vs Noise Frequency
Figure 5-12 Fluxgate Sensor Front-end Noise Density vs Noise Frequency
DRV425 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level Histogram
VDD = 3.3V
Figure 5-14 Fluxgate Sensor Saturation ( ERROR Pin) Trip Level Histogram
DRV425 Compensation Coil Resistance Histogram
Figure 5-16 Compensation Coil Resistance Histogram
DRV425 Shunt-Sense Amplifier Output Offset Histogram
VDD = 5V
Figure 5-18 Shunt-Sense Amplifier Output Offset Histogram
DRV425 Shunt-Sense Amplifier Output Offset vs Supply Voltage
Figure 5-20 Shunt-Sense Amplifier Output Offset vs Supply Voltage
DRV425 Shunt-Sense Amplifier CMRR Histogram
Figure 5-22 Shunt-Sense Amplifier CMRR Histogram
DRV425 Shunt-Sense Amplifier PSRR Histogram
Figure 5-24 Shunt-Sense Amplifier PSRR Histogram
DRV425 Shunt-Sense Amplifier AINP Input Impedance Histogram
Figure 5-26 Shunt-Sense Amplifier AINP Input Impedance Histogram
DRV425 Shunt-Sense Amplifier AINN Input Impedance Histogram
Figure 5-28 Shunt-Sense Amplifier AINN Input Impedance Histogram
DRV425 Shunt-Sense Amplifier Gain Error Histogram
Including IFG, VDD = 5V
Figure 5-30 Shunt-Sense Amplifier Gain Error Histogram
DRV425 Shunt-Sense Amplifier Gain Error vs Temperature
Figure 5-32 Shunt-Sense Amplifier Gain Error vs Temperature
DRV425 Shunt-Sense Amplifier Linearity Error vs Supply Voltage
Figure 5-34 Shunt-Sense Amplifier Linearity Error vs Supply Voltage
DRV425 OR Pin Trip Level vs Supply Voltage
Figure 5-36 OR Pin Trip Level vs Supply Voltage
DRV425 OR Pin Trip Delay vs Temperature
Figure 5-38 OR Pin Trip Delay vs Temperature
DRV425 Shunt-Sense Amplifier Output Short-Circuit Current vs Temperature
Figure 5-40 Shunt-Sense Amplifier Output Short-Circuit Current vs Temperature
DRV425 Shunt-Sense Amplifier Small-Signal Settling Time
Falling edge
Figure 5-42 Shunt-Sense Amplifier Small-Signal Settling Time
DRV425 Shunt-Sense Amplifier Large-Signal Settling Time
Falling edge
Figure 5-44 Shunt-Sense Amplifier Large-Signal Settling Time
DRV425 Shunt-Sense Amplifier Overload Recovery Response
VDD = 3.3V
Figure 5-46 Shunt-Sense Amplifier Overload Recovery Response
DRV425 Reference Voltage Histogram
VREFOUT = 2.5V
Figure 5-48 Reference Voltage Histogram
DRV425 Reference Voltage vs Supply Voltage
Figure 5-50 Reference Voltage vs Supply Voltage
DRV425 Reference Voltage vs Reference Output Current
Figure 5-52 Reference Voltage vs Reference Output Current
DRV425 Reference Voltage PSRR Histogram
Figure 5-54 Reference Voltage PSRR Histogram
DRV425 Reference Short-Circuit Current vs Temperature
Figure 5-56 Reference Short-Circuit Current vs Temperature
DRV425 Quiescent Current vs Temperature
Figure 5-58 Quiescent Current vs Temperature
DRV425 Power-On Reset Threshold vs Temperature
Figure 5-60 Power-On Reset Threshold vs Temperature