SBOSAJ5 December   2024 TMP113

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Decoding Temperature Data
      3. 7.3.3 Temperature Limits and Alert
      4. 7.3.4 NIST Traceability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous-Conversion Mode
      2. 7.4.2 One-Shot Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
      2. 7.5.2 Bus Overview
      3. 7.5.3 Device Address
      4. 7.5.4 Bus Transactions
        1. 7.5.4.1 Writes
        2. 7.5.4.2 Reads
        3. 7.5.4.3 General Call Reset Function
        4. 7.5.4.4 SMBus Alert Response
        5. 7.5.4.5 Time-Out Function
        6. 7.5.4.6 Coexist on I3C Mixed Bus
  9. 8 Register Map
    1. 8.1 Temp_Result Register (address = 00h) [reset = 0000h]
    2. 8.2 Configuration Register (address = 01h) [reset = 40A0h]
    3. 8.3 TLow_Limit Register (address = 02h) [reset = 4B00h]
    4. 8.4 THigh_Limit Register (address = 03h) [reset = 5000h]
    5. 8.5 Device ID Register (Address = 0Bh) [reset = 113xh]
    6. 8.6 Unique_ID0 Register (Address = 0Ch) [reset = xxxxh]
    7. 8.7 Unique_ID1 Register (Address = 0Dh) [reset = xxxxh]
    8. 8.8 Unique_ID2 Register (Address = 0Eh) [reset = xxxxh]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Equal I2C Pullup and Supply Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
    2. 12.2 Tape and Reel Information

7.5.4.4 SMBus Alert Response

The TMP113 device supports the SMBus alert response. When the TMP113 operates in Alert Mode, and the ALERT pin is available, the controller can sense that an alert condition is present. Irrespective of the availability of the ALERT pin, the alert status is set. As shown in Figure 7-10, if the controller sends an SMBus alert command (19h or 00011001b) on the bus, and the alert is set, the device acknowledges the SMBus alert command and responds by returning the device address on the SDA line. The eighth bit (LSB) of the device address byte indicates if the alert condition is caused by the temperature exceeding THigh_Limit or falling below the TLow_Limit. The value of the eight bit follows the Polarity bit setting.

TMP113 SMBus Alert ResponseFigure 7-10 SMBus Alert Response

If multiple devices on the bus respond to the SMBus alert command, arbitration during the device address portion of the SMBus alert command determines which devices the ALERT pin is activated. The device with the lowest address wins the arbitration. On winning the arbitration, the TMP113 inactivates the ALERT pin and/or clears the status bit. To prevent the device with lowest I2C address in continuous conversion mode sees the alert line and halt others with higher I2C address to report the alert, the controller has to temporarily disable the Alert mode in device with smallest I2C address until all alerts in the system are cleared.