SBOU227A September   2019  – November 2023 ALM2402F-Q1

 

  1.   1
  2.   ALM2402F-Q1 Evaluation Module
  3.   Trademarks
  4. 1Introduction
  5. 2EVM Circuit Description
  6. 3Jumper Settings
  7. 4Power-Supply Connections
  8. 5Input and Output Connections
  9. 6Modifications
  10. 7Schematic, PCB Layout, and Bill of Materials
    1. 7.1 Schematic
    2. 7.2 PCB Layout
    3. 7.3 Bill of Materials
  11. 8Revision History

PCB Layout

The ALM2402FQ1EVM is a four-layer PCB design. Figure 7-2 to Figure 7-5 show the PCB layer illustrations. The top layer consists of all signal path traces, and is poured with a solid ground plane. A symmetrical board layout is used on amplifier 1 and amplifier 2 to keep good performance matching. Decoupling capacitors C4, C5, and C10 are positioned on the top layer as close as possible to the power supply pins of the device. The second internal layer is a dedicated solid GND plane. Independent vias are placed at the ground connection of every component to provide a low-impedance path to ground. The third internal layer and the bottom layer route the power-supply connections.

GUID-D20B555E-C15F-4502-8462-1E779ABADCBB-low.png Figure 7-2 Top Overlay PCB Layout
GUID-36E255CE-2442-4210-91E8-BF47EE06D72E-low.png Figure 7-3 Top Layer PCB Layout
GUID-5F6B8531-2A29-4E0E-A897-287452D9B10B-low.png Figure 7-4 Ground Layer PCB Layout
GUID-BA1F4908-0880-43D8-9CB6-92D73820C9E9-low.png Figure 7-5 Power Layer PCB Layout
GUID-125AF090-3833-48CF-98E3-A63C513F10AC-low.png Figure 7-6 Bottom Layer PCB Layout