SCASE79A April   2025  – September 2025 TPUL2T323

PRODUCTION DATA  

  1.   1
  2.   2
  3. 1 Features
  4. 2 Applications
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     14
    8. 5.7 Switching Characteristics
    9. 5.8 Typical Characteristics
  8. 6 Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Naming Convention
      2. 7.3.2 Retriggerable One-Shot
      3. 7.3.3 Extended RC Timed One-Shot
      4. 7.3.4 Balanced CMOS Push-Pull Outputs
      5. 7.3.5 CMOS Schmitt-Trigger Inputs
      6. 7.3.6 Latching Logic with Known Power-Up State
      7. 7.3.7 Partial Power Down (Ioff)
      8. 7.3.8 Reduced Input Threshold Voltages
      9. 7.3.9 Clamp Diode Structure
    4. 7.4 Device Functional Modes
      1. 7.4.1 Off-State Operation
      2. 7.4.2 Startup Operation
      3. 7.4.3 On-State Operation
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application - Edge Detector
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Timing Components
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
        4. 8.2.1.4 Power Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application - Delayed Pulse Generator
      1. 8.3.1 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information

5.6 Timing Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER DESCRIPTION CONDITION VCC MIN MAX UNIT
twi Pulse duration Any trigger input 1.5V 18.2 ns
1.8V ± 0.15V 9.9
2.5V ± 0.2V 7.8
3.3V ± 0.3V 5.8
5V ± 0.5V 4.1
tsu Setup time between trigger inputs T low before T↑ or CLR↑ 1.5V 9.6 ns
1.8V ± 0.15V 8
2.5V ± 0.2V 6.9
3.3V ± 0.3V 6.6
5V ± 0.5V 6.5
T high before T↓ or CLR↑ 1.5V 5 ns
1.8V ± 0.15V 5
2.5V ± 0.2V 5
3.3V ± 0.3V 5
5V ± 0.5V 5
CLR high before T↓ or T↑ 1.5V 9.2 ns
1.8V ± 0.15V 7.8
2.5V ± 0.2V 6.7
3.3V ± 0.3V 6.5
5V ± 0.5V 6.4
th Hold time Any trigger input 1.5V 9.3 ns
1.8V ± 0.15V 7.8
2.5V ± 0.2V 6.7
3.3V ± 0.3V 6.5
5V ± 0.5V 6.4
trr(1) Retrigger time Any trigger input, Rext = 100kΩ, Cext = 100pF 1.5V 13.1 µs
1.8V ± 0.15V 13
2.5V ± 0.2V 12.6
3.3V ± 0.3V 12.5
5V ± 0.5V 12.2
Any trigger input, Rext = 10kΩ, Cext = 0.1µF 1.5V 2 ms
1.8V ± 0.15V 2
2.5V ± 0.2V 2
3.3V ± 0.3V 2.1
5V ± 0.5V 2.1
Any trigger input, Rext = 10kΩ, Cext = 10µF 1.5V 912 ms
1.8V ± 0.15V 911
2.5V ± 0.2V 904
3.3V ± 0.3V 893
5V ± 0.5V 864
tstartup(2) Startup time 1.5V to 5.5V 0 µs
(1) Triggering the clear input (CLR) more often than 2500 × Cext may affect long-term reliability of the device. Repeated fast triggering of the clear input causes excessive average current at the RC pin.
(2) Triggers received during device startup may be ignored. The external timing capacitor requires time to charge after startup. For optimal first pulse accuracy, wait a minimum of 500 × Cext after supply voltage has reached stable operating conditions before applying the first trigger.